Two timer channels - Processor Expert

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Two timer channels - Processor Expert

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Contributor I

I have a question regarding the timer channels. My application needs 2 timers. I tried to add one more channel in the processor expert. However, I don't know how to build the code with two or more channels.

Could someone help me? 

Thank you so much

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8 Replies

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NXP Employee
NXP Employee

Hello,

You can find an PWM example (two channels of the FTM timer) in the discussion thread How to setup PWM_LDD for FTM1_CH0 and FTM_CH1. There is also attached an example of the application for FRDM-KE02Z target board.

If you need different use case, please specify what functionality of the FTM/TPM you need (e.g. two channels of FTM timer to generate interrupts only) and the target MCU.

Best Regards,

Marek Neuzil

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Contributor III

Hi,

I'd like to ask you similar question related to 8 PWMs that are utilizing the same TimerUnit FTM3 component. This is working on Kinetis MK61 MCU.

How to make many PWMs, that reuse the same TimerUnit + channels to run independently ? E.g. turning one PWM doesn't affect other PWMs (for Enabling/Disabling them) ? For now, enabling one PWM affects other PWMs.

My configuration info:

Due to fact, that all of them use the same FTM3 module, I've made them to use the same FTM3_CNT counter. Here is part of MCU pinout:

MK61_PWM.png

I had to reuse the same FTM3 due to pinout configuration. Trying to use other FTM (and therefore other TimerUnit) in Processor Expert causes error:

PWM_error.png

So, I'm trying to use TimerUnit's channels to make it possible to work with many PWMs:

PWM_channels.png

(here are only 2 channels, however it's the same with 8 channels).

Having that setup I've got warnings:

Warning: Referenced TimerUnit "TU_PWM" contains another channel that is not used by "PwmLdd1". This channel(s) may be affected by method Enable/Disable of component "PwmLdd1".

Warning: Referenced TimerUnit "TU_PWM" contains another channel that is not used by "PwmLdd2". This channel(s) may be affected by method Enable/Disable of component "PwmLdd2".

That's probably the reason, why they are coupled. Is there any way to make them independent ?

Thank you,

Maciej Wdowiarz-Bilski

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NXP Employee
NXP Employee

Hello,

You can add eight PWM_LDD component into your MK61 project and share one TimerUnit_LDD component by all these PWM_LDD components. See the following screenshot and attached project (KDS 3.0.0).

pastedImage_0.png

The Enable()/Disable() methods of PMW_LDD components enable/disable the whole FTM3 device (the TimerUnit component that is shared by all PWM_LDD components). If you need to set a specific value on a PWM output pin you can use SetValue()/ClearValue() methods of PWM_LDD component. If need to disconnect the PWM pin and route another device to the pin you can use the pin sharing functionality (ConnectPin() methods of components in the project) or you can just use PDD macros of the FTM device for execution of the required functionality (e.g. FTM_PDD_WriteChannelControlReg()).

Best Regards,

Marek Neuzil

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Contributor III

Hi,

Thank you for response. Actually, I've tried to to use PWM1_SetValue() and PWM1_ClrValue() functions however I don't have the effect I'm expecting (I see no output on the oscilloscope connected to 2 PWMs).

When I'm trying to tackle with PWM1_Enable() and PWM1_Disable(), I've following signals on the output PWMs:

tek00000.png

as you may see, both PWMs are synchronized and that's not what I'd like to achieve. I want to have them alternate with half period (half period offset). Using PWM1_SetValue()/PWM1_ClrValue() don't generate any signal.

Looking inside header files, I've found FTM_PDD.h file with definitions like FTM_PDD_CHANNEL_0_MASK  ...  FTM_PDD_CHANNEL_7_MASK, however I didn't see any information how to use it to mask timer channels and - if possible - to switch the mask to steer different PWMs with one FTM timer. Is it feasible ?

Both of my PWMs are configured very similarly:

PWM1.pngPWM2.png

Thank you,

Maciej Wdowiarz-Bilski

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NXP Employee
NXP Employee

Hello,

I am sorry but I am not sure what you want to achieve. I don't understand the following sentence " I want to have them alternate with half period (half period offset)".

Could you provide detailed description of the required signal, please? It seems that you need a synchronization of two PWM outputs but I don't understand the dependency (setting of the PWM duties, polarity of signals and offset between two PWM signals).

For example, you can use Combine mode of the FTM device (enhanced functionality of the FTM; see the K61 Reference Manual http://www.freescale.com/files/microcontrollers/doc/ref_manual/K60P144M150SF3RM.pdf?fpsp=1&WT_TYPE=R...) but this mode is not supported by the PWM_LDD component. You must use the Init_FTM in this case.

Best Regards,

Marek Neuzil

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Contributor III

Thank you for answer,

Sorry for not being clear with this. Here is picture, what I'd like to have with 3 PWMs, which are handled by the same TimerUnit, controlled by one FTM:

PWM_3_phase.png

So, all 3 PWMs would have the same period, however, they are phase-shifted.

The problem is that they remain synchronized as on the oscilloscope screenshot, I've posted in previous comment. I suspect that this is so the TimerUnit's channels are synchronized and calling PWM1_Enable() and PWM1_Disable() turns on / off entire timer.

Thus I'm trying now to handle Output Mask for handling the channels by: FTM_PDD_WriteOutputMaskReg(FTM3_BASE_PTR, FTM_PDD_CHANNEL_0_MASK) however I don't see any effects. I've also tried with the macro FTM_OUTMASK_REG(FTM3_BASE_PTR) = 1 however no effect in this time. I'm calling this just after setting up Processor Expert ( PE_low_level_init() ).

Maybe there is other way to handle this situation ?

Regards,

Maciej Wdowiarz-Bilski

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NXP Employee
NXP Employee

Hello,

The synchronization of PWM channels is done by the FTM device itself. There is one counter that is shared by all FTM channels. Each PWM channel has own match register only and the PWM signal is generated based on counter value:

- counter overflow - set the output signal to high (or low) level

- match value of the channel register  - set the output signal to low (or high) level

When you use the PWM_LDD component the Edge-aligned PWM mode is used and you cannot define the offset by using driver methods.

In your use case you may use the Combine mode of FTM channels. You can use Init_FTM component for initialization of the FTM device and write your own code for run-time configuration of the FTM device. You can find detailed description in the reference manual of the K60 MCU and in the application note AN4973 - Using FlexTimer in ACIM/PMSM Motor Control Applications (http://www.freescale.com/files/microcontrollers/doc/app_note/AN3729.pdf?fsrch=1&sr=1&pageNum=1).

In the Combine mode you can define two values (you have two match registers per PWM channel) and you can define offset of each PWM channel. See the Functional description chapter of the FTM (Combine mode and PWM Synchronization chapters).

Best Regards,

Marek Neuzil

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Contributor III

Thank you for note about FTM COMBINE mode. I'll follow this direction.

So far, I thought that these are FTM channels, not PWM channels, thus my misinterpretation.

I've looked at document with these complementary pairs of PWMs + FTM offset for such PWM channels pairs. This may be good solution, however I need to check if the PWM edge can be synchronized with other time synchronizing source. I need to have these very precise and therefore external synchro signal is required.

So, if there is no possibility mask/turn off-on particular PWM channels, this would be the only option.

Regards,

Maciej Wdowiarz-Bilski

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