Hey, I have some question about the ordering information of MPC8270 processor. I would like to ask that in this processor "MPC8270CVVQLDA" what does QLD refers to? and can you provide me the difference between 60x and Local Bus of MPC8270 architecture

[muhammadumersae]

Dear All,

I am a little confused in interfacing SDRAM to MPC8270 processor's chipselect.
That is, what is the maximum size of SDRAM that i can interface with processor's chipselect.
From MPC8280 reference manual (page no 425) it is stated that maximum size is 128Mbytes .
On the other side, of you refer to manual's (page number 436) it is stated that maximum size is 4GB. (128 MB if page based interleaving is disabled).
Kindly help me with this confusion.

Regards

[alexander_yakov]

There is no limitation for SDRAM size, 128MB limitation per one chip-select - is for bank-based interleaving.

For page-based interleaving there is no 128MB limitation, and actual memory size depends on your SDRAM row/column configuration only.

Please refer to Application Note AN2165 "MPC8260 SDRAM Support" for more information

https://www.nxp.com/docs/en/application-note/AN2165.pdf 

Have a great day,
Alexander
TIC

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