How to disable PCI interface in MPC8315E

[airazusta]

Hello,

We are designing a board containing the MPC8315E, but we are not using the PCI interface, so we want to disable it or configure it in such a way that it consumes the least power as possible. Which hardware and software configuration should we use for that?   

Following the AN3438, I have connected the PCI interface pins as described in Table 8 (If Not Used option), but I don't know if I should use SYS_CLK_IN or PCI_CLK as the system clock input and how I should configure the PCI registers.

Any help will be welcome!

Regards,

Ane

[alexander_yakov · Accepted solution]

There is no special "PCI disabled" mode, the PCI can be only "Not used". MPC8315 Design Checklist (application note AN3438), Section 7.1 contains special recommendations for termination of PCI pins in "If not used" case. Looking to PCI_AD[31:0], you can see that no termination required for these pins only if PCI bus is parked - PCI host mode is selected, PCI arbiter is enabled and bus is parked to PCI controller. In this case you do not need to pull-up PCI_AD[31:0] and some other PCI pins. So, the recommended mode for PCI not used is PCI Host, and clocking mode should be also for PCI host.

Direct link to AN3438 "MPC8315 Design Checklist":

https://www.nxp.com/docs/en/application-note/AN3438.pdf

Have a great day,
Alexander,
TIC

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[airazusta]

Just a little question for being sure: 

According to "AN3438 Section 4.3 System Clock if PCI is Disabled", 

"If the PCI interface is not used, PCI_CLK is the primary input clock. CLKIN and CFG_CLKIN_DIV can
be tied to GND in case the CLK is fed directly from PCI_CLK. However CLK can still be fed through the
CLKIN pin and PCI_SYNC_OUT and PCI_CLK need to be shorted. CFG_CLKIN_DIV will have no
effect on the output of CLK unit."

If I don't use the PCI interface, parking the bus as you mentioned (PCI host mode is selected, PCI arbiter is enabled and bus is parked to PCI controller), the AN3438 says that when PCI is configure in Host mode SYS_CLK_IN has to be used as primary input clock and PCI_SYNC_OUT has to connect to PCI_SYNC_IN. This clock configuration  doesn't match completely with what is said in section 4.3. 

So here comes my doubt: if I leave the PCI bus parked, could I use PCI_CLK as the primary input clock (so that I avoid using the internal circuitry between SYS_CLK_IN adn PCI_SYNC_OUT), or SYS_CLK_IN must be used?

Thank you very much!

Regards,

Ane

[alexander_yakov]

Both variants are possible:

1. clock may be applied to SYS_CLK_IN and PCI_SYNC_OUT tied with PCI_SYNC_IN

2. Or you can apply clock directly to PCI_CLK and tie CFG_CLKIN_DIV and PCI_CLK_IN to GND

The result will be the same.

[airazusta]

Thanks! :smileyhappy:

Ane