We are debugging u-boot using trace32 on our new processor board with an T4240RDB.
We are currently blocked in our development. We are having problems with Trace32 debugger
Here the situation:
We understand that in order to get hardware breakpoints to work we need:
1- A valid address with a valid instruction at IPVR
2- DE bit enable in MSR register
3- To avoid problems; always set breakpoints before or after code which accesses SRR0 and SRR1, and never step through such code.
We have also verify that:
After rfi instruction, jump to 0xEFFFF574 but, there is no data present and also all address same like that (data :??????????????)
Solved! Go to Solution.
it seems some of the prerequisites you mention are for e500 cores and do not apply to e500mc/e5500/e6500 cores.
Please contact your local TRACE32 FAE for assistance. You can find the contact information here: