PF5020 PMIC – OTP Protection and Communication Sequence Clarification

[Shivani_Elavena]

Hi,

We have integrated the PF5020 PMIC with an NXP controller(IMXRT1176), and we have a couple of questions:

1. Is there a specific register bit or method to disable or lock out OTP (One-Time Programming) to prevent accidental writes during development? If it is, then provide a detail document or description.

2. The datasheet doesn’t show a detailed I2C communication read/write sequence. Is there any reference document or application note that outlines the proper sequence for safe register access?

Thanks in advance for your help.

Best regards,
Shivani 

[guoweisun · Accepted solution]

Hi Shivani 

1. Is there a specific register bit or method to disable or lock out OTP (One-Time Programming) to prevent accidental writes during development? If it is, then provide a detail document or description.[gw]No there is no.

2. The datasheet doesn’t show a detailed I2C communication read/write sequence. Is there any reference document or application note that outlines the proper sequence for safe register access?

        [gw]Please see attached.