Hello Gumu,
please refer to the sections 19.2.1.2 and 19.2.2 in the full FS23 datasheet. By incorrect or none Watchdog refresh, Watchdog error counter is incremented by 2. By default the Watchdog error counter limit is set to 6. To reach the limit three incorrect or none watchdog refreshes are needed. Please check the WD_ERR_LIMIT[1:0] bits setting. Have you left them in default value 6? The green waveform in your scope is from the RSTB pin, right?
If you have left the WD_ERR_LIMIT[1:0] to 6, then three incorrect or none WD refreshes would be needed (3*64ms=192ms), if to 8 then four (4*64ms=256ms).
Then if the WD recovery is set to 64ms, this would add to the time above. Please check the WDW_REC_EN bit setting. Have you set it to 1? For the MCU fault recovery strategy please refer to the section 19.2.5.
Please check how have you set the FCCUx error impact configuration. Have you left it to default? If yes, please probe the FS0B pin. To compare it with the RSTB pin. When the WD_ERR_LIMIT[1:0] has reached it's maximum value, the FS0B should be pulled low and Error phase should start. Please refer to the Figure 45.
With Best Regards,
Jozef