TDA8034 deactivate sequence

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TDA8034 deactivate sequence

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Slience5
Contributor I

Hi,

There is a question about TDA8034 deactivate sequence. The spec defines the CMDVCC goes high firstly then the reset signal goes low and then the clock stops. However, the measured waveform on a Dell laptop indicates the sequence is reversed. Is that a problem?

Regards,

Josh

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Slience5
Contributor I

Hi Tony,

Thanks for the quick response. I should have attach the activate and deactivate sequence waveform in the spreadsheet to the ticket. I could upload the file again. It contains the okay and ng part waveform, though, I can't tell the differences. The TDA8034 schematics is in the tab of the spreadsheet as well. Please let me know if you still don't see the spreadsheet.

Regards,

Josh

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danielchen
NXP TechSupport
NXP TechSupport

Hi @Slience5 

 

From the waveform,  I can see the OK part and NG part,   mean some devices are okay and some are NG in your side?   does the NG part not work correctly?

I don't see any difference that can impact the functionality.

 

Regards

Daniel

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Slience5
Contributor I

Hi Daniel, 

My apologies for calling you Tony. Working on many things at the same time. 

I can't tell the difference between Ok and NG part, too. However, we hope to consult with you if you have any concern over the deactivate sequence which doesn't match the spec. The NG parts sometimes not work properly, not all the time. We can rule out the timing violation from causing the issue if you don't have concerns. 

Regards,

Josh

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danielchen
NXP TechSupport
NXP TechSupport

Hi @Slience5 

 

Could you please attach the activation sequence and deactivation sequence in your side , and schematics here for further analyzing?  or through a ticket is also OK.

 

Regards

Daniel

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