Overview NXP solutions enable AD/DC chargers in hybrid electric vehicles (HEV). The AD/DC charger interfaces with the battery management system to ensure a proper charge of electricity of the cells until it fulfills high-voltage (HV) requirements. Our comprehensive portfolio provides the critical building blocks for high-performance, efficient and safe pawer management control system for electric traction motors.   Use Cases This solution can be applied and various sectors of the industry, specially in the automotive field. NXP solutions enable Hybrid and Electric Vehicles applications as: Converters and Chargers Stop/Start Systems Power inverters   Block Diagram Products Category MCU Product URL S32K144EVB: S32K144 Evaluation Board  Product Description The S32K144EVB is a low-cost evaluation and development board for general purpose automotive applications.   Category Safety SBC Product URL 1 FS6500: Grade 1 and Grade 0 Safety Power System Basis Chip with CAN Flexible Data Transceiver  Product Description The NXP® FS6500 system basis chip (SBC) provides power to MCUs and optimizes energy consumption through DC/DC switching regulators, linear regulators, and ultra-low-power saving modes.   Category RTC Product URL PCA85073A: Automotive tiny Real-Time Clock/Calendar with alarm function and I2C-bus  Product Description The PCA85073A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption.   Category Serial Interface Product URL  MC33660: ISO K Line Serial Link Interface  Product Description The NXP® MC33660 is a serial link bus interface device designed to provide bi-directional half-duplex communication interfacing in automotive diagnostic applications.

this doc and project explain how to integrate S32G M stby demo and Linux STR demo to one demo to achieve the fast boot, chinese version: 本文说明如何在S32G2 RDB2板上搭建 一个M7 MCAL Standby Fullboot GPIO resume Demo加A53 Suspend to RAM的Demo，主要的 应用场景是电动汽车的快速启动。 G3与更新版本BSP的支持情况与此类 似，不再另外说明，客户可以自行参考开发。 请注意本文为培训和辅助文档，本文不是 官方文档的替代，请一切以官方文档为准。     目录 1 参考资料说明与声明 .................................................. 2 2 STBY+STR的硬件注意点 .......................................... 3 3 修改M7 MCAL Standby Demo代码 ............................ 5 3.1 Clock相关修改 ........................................................ 5 3.2 MCU相关修改 ......................................................... 5 3.3 UART Clock相关修改 ............................................. 7 3.4 Port相关修改 .......................................................... 7 3.5 I2C相关修改 ........................................................... 7 3.6 实现M核进入STDY状态等待功能 ........................... 8 3.7 Main函数的修改 ..................................................... 8 4 修改Bootloader工程来支持同时Boot M/A核Demo ... 10 4.1 I2C Clock相关修改 ............................................... 10 4.2 Port相关修改 ........................................................ 11 4.3 其它修改 ............................................................... 12 5 修改A53 Linux代码 .................................................. 13 6 Demo 运行测试 ........................................................ 13 6.1 硬件连接 ............................................................... 13 6.2 镜像烧写 ............................................................... 13 6.3 Demo运行 ............................................................ 14 7 工程发布包............................................................... 15 8 未来开发建议 ........................................................... 17 8.1 M/A核同步机制 ..................................................... 17 8.2 功能安全与信息安全 ............................................. 17 9 遗留问题 .................................................................. 17 9.1 IPCF STR支持 ...................................................... 18 9.2 PFE Slave STR支持 ............................................. 18 注意以下说明与声明： 说明： 汽车网关有快速启动要求，而电动车因为驻车时有更大的电池提供待机电源，所以希望是使 用Linux 的suspend to ram 的功能来实现Linux 的快速启动，而在S32G 上则需要考虑将M 核的 Standby 功能 与A 核的STR 功能 结合起来，目前可用的资源包括：  从BSP32 起支持ATF，可以支持Linux 端的STR 功能，文档《S32G_Linux_STR_V1-*.pdf》 (John.Li)说明linux STR 的原理和与M7 Standby Demo 结合时所需要的修改。  NXP 的M7 内部standby demo，可以支持M 核端的standby 功能，支持full boot 和standby ram boot。文档《S32G_Standby_Demo_V4-*.pdf》(John.Li)有详细说明，本文使用MCAL full boot+GPIO resume Demo。  本Demo 与本文主要说明如何将这两个Demo 结合起来，形成一个整体的Demo。  由于需要Boot M 核加A 核，所以也需要Bootloader 工程的支持，文档 《S32G_Bootloader_V1-*.pdf》(John.Li)说明了如何创建一个MCAL sample 加Linux 的 Bootloader 工程。 声明： 请注意：  M7 standby demo 本来为NXP 内部Demo，不保证运行质量。而Linux 本身也是reference software。  Linux STR 本身会引入比较复杂的电源管理切换，也会引起系统级的不稳定性。  本文所说的方法也是实验性质，不保证运行质量。 所以客户应该谨慎决定其产品功能并自行保证其产品质量，本文及本Demo 仅为Demo 性质。   This article explains how to build a demo of M7 MCAL Standby Fullboot GPIO resume Demo plus A53 Suspend to RAM on the S32G2 RDB2 board. The main application scenario is the quick start of electric vehicles. The support situation of G3 and the newer version of BSP is similar to this, no further explanation is given, customers can refer to it for development by themselves.  Please note that this article is a training and auxiliary document. This article is not a substitute for the official document. Please refer to the official document. Contents 1    Reference materials and statement 2 2    STBY+STR hardware checkpoints. 3 3    Modified M7 MCAL Standby Demo codes. 5 3.1  Clock modification. 5 3.2  MCU related modification. 6 3.3  UART Clock related modificaiton. 7 3.4  Port related modification. 8 3.5  I2C related modification. 8 3.6  Enable the waiting function of M core entering STDY. 9 3.7  Main function modification. 9 4    Modify the Bootloader project to support simultaneous M/A core demo  11 4.1  I2C Clock related modification. 11 4.2  Port related modifcaiton. 11 4.3  Others modificaiton. 13 5    Modify A53 Linux codes. 14 6    Demo running and testing. 14 6.1  Hardware link. 14 6.2  Image burning. 14 6.3  Demo running. 15 7    Project release package. 16 8    Suggestion for the future development 17 8.1  M/A core sync mechanism.. 17 8.2  Function safety and Information security. 17 9    Remaining issues. 18 9.1  IPCF STR support 18 9.2  PFE Slave STR support 18   as need refer:   S32G_Linux STR This doc explain S32G Linux STR details and modify to integrate with M stdy demo https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-Linux-STR/ta-p/1652680 S32G Standby Demo the project build a new Mcal standby demo and explain its details https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-M-kernel-Standby-demo-and-how-to-porting-to-Mcal/ta-p/1556313 S32G Boot customization doc how to run bootloader to run mcal&linux https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-Bootloader-Customzition/ta-p/1519838

Description Earlier this year NXP organized a promotional opportunity for amateur radio enthusiasts to use their creativity and build their own power amplifier designs. NXP received numerous creative submissions in this competitive Homebrew RF Design Challenge. We appreciate the dedication and enthusiasm from the community that made this contest a success. First place winner An MRF101AN broadband amplifier design with 1 W Input, 100 W Output 1.8-54 MHZ Amplifier deck. (For more information visit:NXP MRF-101 - RFPowerTools )  It is an amplifier with a bandwidth of 1.8MHz to 54MHz. Maximum output power of 100W up to 30MHz and 70W up to 50MHz. Maximum power supply 50V to 4A, with a Voltage Standing Wave Ratio of 1.5:1 maximum. The design dimensions of the PCB is 5x5 cm (2x2 in). and 310g weight including fan and heat sink. Second place winner A 600W broadband HF amplifier using affordable LDMOS devices (For more information visit: https://qrpblog.com/2019/10/a-600w-broadband-hf-amplifier-using-affordable-ldmos-devices/  ) This project is meant to demonstrate the capabilities of the MRF300 transistors as linear broadband devices in the 2-50MHz range and to be used by radio amateurs as a starting point for a medium-high power amplifier. This is also my entry to the NXP Homebrew RF Design Challenge 2019. To achieve the target of 600W output while also minimizing the level of even-number harmonics, a “push-pull” configuration of two transistors is used. Luckily, the manufacturer made it easy to design the PCB layout for such a thing by offering two versions (the MRF300AN & MRF300BN) that have mirrored pinout. The common TO-247 package is used, with the source connected to the tab. Each individual MRF300 LDMOS transistor is specified at 330W output over a 1.8-250MHz working frequency range, a maximum 28dB of gain and over 70% efficiency. The recommended supply range is 30-50Vdc. By studying the specifications, it looks like with correct broadband matching and some operational safety margin we can get close to 600W output at a voltage of around 45V across a resonably large bandwidth; the aim is to cover 1.8 to 54MHz. Main challenges when designing this amplifier are related to achieving good input and output matching over the entire frequency range as well as maintaining high and flat gain. Good linearity and a low level of harmonic products are mandatory. As the TO-247 is not a package specifically designed for high-power RF, there are some challenges with thermal design and PCB layout as well. Information taken from the essay by the winner. Third place winner A High Efficiency Switchmode RF Amplifier using a MRF101AN LDMOS Device for a CubeSat Plasma Thruster (For more information visit: Research - SuperLab@Stanford ) The Class E amplifier utilizes the active device as a switch, operating in only cutoff (off) and saturated (on) conditions. This minimizes the overlap of voltage and current, reducing losses in the active device. To further reduce loss the Class E amplifier utilizes an inductively tuned resonant network to achieve zero voltage switching, bringing the voltage across the switch to zero before turn on, eliminating energy stored in the output capacitance of the active device that would otherwise be dissipated. This is achieved with an inductively tuned series resonant output filter.  In the Class E amplifier losses are almost entirely determined by the current conducted by the active device so a high drain impedance is desired to maximize efficiency. The drain impedance is ultimately limited by the voltage rating of the switch. For our desired output power of 40W and the maximum voltage rating of 133V for the MRF101AN this impedance is still less than 50 ohms, so a L match circuit is used to match the drain impedance to 50 ohms. The load network in our design provides a drain impedance of 15.4+12.8j. As the MRF101AN will operate in saturation a high drive level is desired. To eliminate the need for a preamplifier and allow for digital control, we use a high speed gate drive chip typically used in switch-mode power supplies, LMG1020, to drive the MRF101AN instead of a RF preamplifier. A resonant network is used to provide voltage gain at the fundamental and third harmonic, providing a quasi-square wave on the gate which helps insure the device remains in saturation. Conclusion It was a close call and highly competitive! Each participant had their own creative, unique and impressive way of displaying the capabilities of these new parts. NXP is always up for new design challenges. Ready for the next challenge?

This doc explain how to support a new QSPI nor for boot, SDK and Linux, Contents as follows: 目录 1 硬件设计 .................................................................... 2 2 所需工具和相关资料 .................................................. 5 3 ROM Code的启动流程 ............................................... 5 4 S32G QSPI NOR flash配置表头定制 ......................... 7 4.1 S32G QSPI NOR启动配置表信息 .......................... 7 4.2 目前支持的配置表头分析说明 ............................... 10 4.3 LUT构成与Flash write Data说明 ........................... 16 4.4 具体分析已有的配置表头的LUT与Flash write Data的 配置方法 ...................................................................... 22 4.5 支持一款新的QSPI NOR Flash示例1:Micron........ 28 4.6 支持一款新的QSPI NOR Flash示例2:Winbond .... 31 5 使用IVT打包配置头 .................................................. 33 6 使用IVT工具中的flash image工具烧写镜像到QSPI NOR 中 34 7 软件定制M7 ............................................................. 35 8 软件定制uboot ......................................................... 37 9 软件定制Linux Kernel .............................................. 40 9.1 支持美光8bit DDR 模式(未验证) .......................... 44 9.2 支持1bit SDR fast read 模式 ............................... 46 10 Debug过程中需要注意的几点 .................................. 49 10.1 启动时ROM Code读取QSPI NOR时钟仅有12Mhz左 右 49 10.2 比较大的镜像如果不加参数头，无法从QSPI-NOR上启 动 55   add a new doc for lauterbach driver: S32G How to Develop the QSPI-Nor Lauterbach Script 目录 1    背景和参考资料... 2 1.1  背景说明... 2 1.2  参考资料... 2 2    高速读开发流程... 3 2.1  时钟相关修改... 5 2.2  Lut配置说明... 6 2.3  QSPI NOR控制器配置... 12 2.4  QuadSPI_Write32BytesDOPI读函数分析... 15 2.5  增加AHB read寄存器配置... 17 2.6  测试结果... 18 3    高速写开发流程... 19 3.1  Erase lut分析及调用... 19 3.2  Write lut分析及调用... 21 3.3  测试结果... 22 3.4  Lauterbach烧写镜像脚本说明... 22

Demo See how NXP integrates automotive and microcontroller technology to develop next-generation drones including high reliability, industrial quality, and additional security with drone-code compliant flight management unit running PX4. Video Features Electronic speed controllers with Field Oriented Control of BLDC (Brushless DC motors) TJA110 2-wire  Automotive Ethernet PHY Transceiver|NXP  SCM-i.MX6 Training https://register.gotowebinar.com/rt/9153317036356506113  Find our more at www.nxp.com/uav

本文说明在S32G2 RDB2板上实现LLCE to PFE Demo的搭建过程。本Demo目前包括：  CANtoEth：CAN0发送，用硬件回环到 CAN1接收，然后通过PFE_EMAC1， 再通过RGMII接口发出。  CANtoEth：CAN0发送，用硬件回环到 CAN1接收，然后通过PFE_EMAC1， 再通过SGMII接口发出。  EthtoCAN：PC通过PFE_EMAC1的 RGMII发出，接收到CAN1，再硬件 回环到CAN0  CANtoCAN Logging to Eth: CAN0发 送，用硬件回环到CAN1接收，然后 通过PFE_EMAC1，再通过SGMII接 口发出,同时LLCE内部硬件把CAN1 再发送到CAN15_TX，再用硬件回环 到CAN14_RX 软件版本为 RTD3.0.0+LLCE1.0.3+PFE0.9.6/0.9.5。

This doc explain how to optimize the Linux boot time, Contents as follows: 目录 1 默认BSP28 Linux内核的启动时间分析和优化方向 ..... 2 2 UBoot的优化 .............................................................. 3 2.1 缩小Uboot的DTS尺寸 ............................................ 3 2.2 缩小Uboot的尺寸 .................................................... 4 2.3 去掉等待3S输入时间 .............................................. 4 2.4 配合内核修改的Uboot参数 ..................................... 4 2.5 关闭串口调试信息 .................................................. 5 2.6 MMC read的方法来读取内核和DTB ....................... 5 3 Kernal的优化 ............................................................. 5 3.1 DTB中去掉不用的驱动和代码 ................................. 5 3.2 内核中去掉不用的平台与驱动及相关代码 ............... 6 3.3 内核中去掉不用功能，缩小内核大小 ...................... 7 3.4 去掉initramfs支持 ................................................... 7 3.5 关闭调试信息 .......................................................... 7 3.6 提前eMMC驱动加载时间 ........................................ 7 3.7 将Kernel与DTB打包在一起..................................... 8 4 Rootfs+应用程序的优化 ............................................. 8 5 最终全部启动时间比较 ............................................. 12

This doc explain our Mcal driver and how to custome them. contents as follows: 目录 1 AutoSAR MCAL基本概念 .......................................... 2 1.1 AutoSAR目标 ......................................................... 2 1.2 AutoSAR概念 ......................................................... 2 1.3 AutoSAR基本方法 .................................................. 2 1.4 BSW(Basic Software) ............................................. 4 1.5 NXP Basic AutoSAR软件 ....................................... 4 1.6 RTE与BSW的配置 ................................................. 5 1.7 BSW的配置流程 ..................................................... 6 1.8 MCAL驱动 .............................................................. 7 2 MCAL工具 ................................................................. 7 3 MCAL说明 ................................................................. 8 3.1 MCAL的下载与说明 ................................................ 8 3.2 EB Tresos的下载，安装 ....................................... 13 3.3 RTD-MCAL安装 ................................................... 16 3.4 Trace32的下载与安装 .......................................... 18 3.5 样例工程的编译，运行 ......................................... 20 4 MCAL驱动配置与定制 ............................................. 40 4.1 MCU ..................................................................... 45 4.2 PORT ................................................................... 59 4.3 DIO ....................................................................... 69 4.4 FlexCAN ............................................................... 71 4.5 FlexLin ................................................................. 87 4.6 GMAC .................................................................. 93 4.7 I2C ..................................................................... 101 4.8 PMIC .................................................................. 108 4.9 PMIC WDOG ...................................................... 127 4.10 WDOG ............................................................... 137 4.11 UART ................................................................. 144 4.12 SPI ..................................................................... 149 4.13 PWM .................................................................. 165 4.14 ADC ................................................................... 171 4.15 Thermal .............................................................. 177

  Overview The growth in automotive emerging markets has increased the need for simple and lower cost instrument cluster solutions. NXP® offers several cost-effective solutions based on its complete range of instrument cluster processors, from the 8-bit S08 family to industry-leading 16-bit S12 architecture, integrating required interface features that include the optimal set of on-chip features, package and memory options. To further help your instrument cluster designs, NXP offers an extensive suite of hardware and software development tools. i.MX8X have similar CPU performance with i.MX6 but 2 times GPU performance. NXP provide function safety ASIL-B cluster solution with hardware/software support. i.MX8X has embedded VPU which can support video stream decoding from IVI to cluster. And also full solution for AVB/TSN in car network.   Block Diagram Products Category MCU/MPU Product URL 1 i.MX 8X Family – Arm® Cortex®-A35, 3D Graphics, 4K Video, DSP, Error Correcting Code on DDR  Product Description 1 Extending the scalable range of the i.MX 8 series, the i.MX 8X family is comprised of common subsystems and architecture from the higher-end i.MX 8 family, establishing a range of cost-performance scaling with pin-compatible options and a high level of software reuse. Product URL 2 S32K144EVB: S32K144 Evaluation Board  Product Description 2 The S32K144EVB is a low-cost evaluation and development board for general purpose automotive applications.   Category Power Management Product URL  PF8100-PF8200: 12-channel Power Management Integrated Circuit (PMIC) for High-Performance Processing Applications  Product Description The PF8100/PF8200 PMIC family is designed for high-performance processing applications such as infotainment, telematics, clusters, vehicle networking, ADAS, vision and sensor fusion.   Category Transceiver Product URL 1 TJA1042: High-speed CAN transceiver with standby mode  Product Description 1 The TJA1042 high-speed CAN transceiver provides an interface between a Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus. Product URL 2 TJA1101: 2nd generation Ethernet PHY Transceivers - IEEE 100BASE-T1 compliant  Product Description 2 TJA1101 is a high-performance single port, IEEE 100BASE-T1 compliant Ethernet PHY Transceiver.   Category Peripherals Product URL1 PCA9538: 8-bit I²C-bus and SMBus low power I/O port with interrupt and reset  Product Description 1 The PCA9538 is a 16-pin CMOS device that provides 8 bits of General Purpose parallel Input/Output (GPIO) expansion with interrupt and reset for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of II2CC-bus I/O expanders. Product URL 2 PCA9955BTW: 16-channel Fm+ I²C-bus 57 mA/20 V constant current LED driver  Product Description 2 The PCA9955B is an I2C-bus controlled 16-channel constant current LED driver optimized for dimming and blinking 57 mA Red/Green/Blue/Amber (RGBA) LEDs in amusement products. Product URL 3 PCT2075: I2C-Bus Fm+, 1 Degree C Accuracy, Digital Temperature Sensor And Thermal Watchdog  Product Description 3 The PCT2075 is a temperature-to-digital converter featuring ±1 °C accuracy over ‑25 °C to +100 °C range. Product URL 4 PCA85073A: Automotive tiny Real-Time Clock/Calendar with alarm function and I2C-bus  Product Description 4 The PCA85073A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption.

The Motor Control Development Toolbox includes an embedded target supporting MCUs, Simulink™ plug-in libraries, and tool chain for configuring and generating the necessary software.     Features Generate code for standalone application with direct download to target support Optimized motor control library blocks including Park/Clarke transforms, digital filters, and general functions I/O blocks including CAN, SPI, PIT timer, Sine Wave Generation, eTimer, PWM and A/D. On-target profiling of functions and tasks Data acquisition and calibration using FreeMASTER tool Boot loader utility for programming application in flash Seamless integration with embedded coder including SIL and PIL test   Products Link S12ZVM S12ZVM Mixed-Signal MCUs|MagniV | NXP  S12ZVM Evaluation Board S12ZVM Evaluation Board | NXP  Links MCToolbox Automotive Block Diagram  

This doc explain the S32G STR feature details and how to modify it to integrate with M kernel STBY demo, to achieve the fast boot. chinese version: 本文说明S32G A53核STR详细情况及定 制，定制部分说明如何与M7 standby demo结 合，来实现整个产品的快速启动。 请注意本文为培训和辅助文档，本文不是 官方文档的替代，请一切以官方文档为准。 目录 1 参考资料说明 ............................................................. 2 2 Demo创建运行过程 ................................................... 2 3 Linux STR流程 ........................................................... 2 4 ATF Suspend流程 ..................................................... 5 4.1 Suspend流程 .......................................................... 5 4.2 Full boot resume流程 ............................................. 7 5 定制修改 .................................................................... 9 5.1 ATF中实现主核切换为M7 ....................................... 9 5.2 ATF中去掉PMIC与I2C4 ....................................... 11 5.3 ATF中去掉wkpu驱动 ............................................ 17 5.4 Uboot中去掉PMIC与I2C4 ..................................... 18 5.5 Kernel中去掉I2C4 ................................................ 19 6 发布 ......................................................................... 20   This article explains the details and customization of S32G A53 core STR. The customization part explains how to combine with M7 standby demo to realize the quick start of the whole product. Please note that this article is a training and auxiliary document. This article is not a substitute for the official document. Please refer to the official document. Contents 1    Reference materials. 2 2    STR Demo. 2 3    Linux STR call flow.. 2 4    ATF Suspend call flow.. 5 4.1  Suspend flow.. 5 4.2  Full boot resume flow.. 7 5    Customization. 9 5.1  The STR main core is switched to M7 in ATF. 9 5.2  ATF remove PMIC and I2C4. 11 5.3  ATF remove wkpu driver 17 5.4  Uboot remove PMIC and I2C4. 18 5.5  Kernel remove I2C4. 19 6    Release. 20

Introduction Background There is not an official data for PCIe latency and performance, while some customers pay attention to and request these data. This paper utilizes Lmbench lat_mem_rd tool and DPDK qdma_demo to test the PCIe latency and performance separately. Requirement 1) Plug Advantech iNIC (LX2160A) into LX2160ARDB. 2) Configure EP ATU outbound window at console. 3) Apply the patch to lmbench-3.0-a9, and recompile lmbench tool. 4) There is qdma_demo in iNIC kernel rootfs by default. Test Environment     PCIe Latency Overview   Direction Description Latency(ns) PCIe(Gen3 x8) – DDR read from EP to RC 900 PCIe – PCIe – DDR Read from EP to EP (through CCN-508) 1550 PCIe – PCIe – DDR Read from EP to EP (through HSIO NOC) 1500 Setup 1) LX2160ARDB 2) iNIC – PCIe EP Gen3 x8 with LX2160A 3) Test App running at iNIC: Lmbench lat_mem_rd   # ./lat_mem_rd_pcie -P 1 -t 1m   PCIe Performance Overview    Direction Throughput (Gbps) PCIe EP to EP 50   Setup 1) LX2160ARDB 2) iNIC – PCIe EP Gen3 x8 with LX2160A 3) Test App : qdma_demo running at iNIC   $./qdma_demo -c 0x8001 -- --pci_addr=0x924fa00000 --packet_size=1024 --test_case=mem_to_pci Peer to Peer On LX2 Rev. 2      Products   Product Category NXP Part Number URL MPU LX2160A https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-lx2160a-lx2120a-lx2080a-processors:LX2160A LSDK software Layerscape Software Development Kit https://www.nxp.com/design/software/embedded-software/linux-software-and-development-tools/layerscape-software-development-kit:LAYERSCAPE-SDK   Tools    NXP Development Board URL LX2160ARDB https://www.nxp.com/design/qoriq-developer-resources/layerscape-lx2160a-reference-design-board:LX2160A-RDB Advantech ESP2120 Card      

This demo which shows a complete Ethernet AVB audio amplifier solution built with NXP silicon and software.     Features Audio Video Bridging for automotive infotainment purposes System AVB amplifier for car audio nodes Analog video/audio is converted into AVB and outputs to vybrid Tower running AVB stack Featured NXP Products Vybrid Qorivva MCU Development Hardware Used Vybrid TWR board

Demo This demo shows an intelligent and efficient automotive system which encompasses surround view (360 Video camera) paired with a LIDAR (360 Laser surround view) for pedestrian detection, traffic sign recognition, speed detection, etc. Products Links NXP BlueBox https://www.nxp.com/design/development-boards/automotive-development-platforms/nxp-bluebox-autonomous-driving-development-platform:BLBX?&fsrch=1&sr=2&pageNum=1 QorIQ® LS2088A Reference Design Board https://www.nxp.com/design/qoriq-developer-resources/qoriq-ls2088a-reference-design-board:LS2088A-RDB?&lang_cd=en S32V230 Family of Processors https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fproducts%2Fautomotive-products%2Fmicrocontro…  S32R Radar Microcontroller - S32R27 https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fproducts%2Fautomotive-products%2Fmicrocontro…  32-bit Automotive General Purpose MCUs https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fproducts%2Fautomotive-products%2Fmicrocontro…  Other Links ADAS & Autonomous Driving|NXP  V2X Communications|NXP 

Demo Owner: Neil Krohn NXP's MM9Z1_638 is a fully integrated battery monitoring device for mission critical automotive and industrial applications. An S12Z microcontroller, SMARTMOS analog control IC, CAN protocol module and LIN interface for communications functions are embedded into this single-package soltuion. The MM9Z1_^38 battery sensor measures key battery parameters for monitoring state of health, state of charge and state of function for early batteries as well as emerging battery applications, such as 14 V stacked cell Li-Ion, high voltage junction boxes, and 24 V truck batteries.     Features The MM9Z1_638 is a fully integrated battery monitoring device for mission critical automotive and industrial applications. An S12Z microcontroller, SMARTMOS analog control IC, CAN protocol module and LIN interface for communications functions are embedded into this single-package solution. The MM9Z1_38 battery sensor measures key battery parameters for monitoring state of health, state of charge and state of function for early batteries as well as emerging battery applications, such as 14 V stacked cell Li-Ion, high voltage junction boxes, and 24 V truck batteries. Featured NXP Products MM9Z1_638: Battery Sensor with CAN and LIN Product Features: Wide range battery current measurement; on-chip temperature measurement Four battery voltage measurements with internal resistor dividers, and up to five direct voltage measurements for use with an external resistor divider Measurement synchronization between voltage channels and current channels Five external temperature sensor inputs with internal supply for external sensors Low-power modes with low-current operation Links Freescale Concept Car  

本文说明S32G HSE On-demand SMR验证的应用方法，本文演示的示例应用为： Secure Bootloader对Linux Bootloader fip.bin的验证 目录 1    背景说明与参考资料... 2 1.1  背景说明... 2 1.2  参考资料... 3 2    S32G On-demand SMR Verification说明... 4 2.1  SMR Verify的说明... 4 2.2  On-demand SMR Verify. 4 3    环境搭建... 5 3.1  EB配置说明... 5 3.2  ATF编译说明... 8 3.3  镜像烧写... 9 4    Bootloader代码开发... 9 4.1  OnDemand SMR install 9 4.2  OnDemand SMR verify. 13 5    测试... 16 5.1  Lauterbach跟踪... 17 5.2  Fip.bin破坏实验... 19 5.3  硬件确认... 19   This application doc explains the application method of S32G HSE On_demand SMR verification. The example application demonstrated in this doc is: Secure Bootloader verification of Linux Bootloader fip.bin This application doc explains the application method of S32G HSE On_demand SMR verification. The example application demonstrated in this doc is: Secure Bootloader verification of Linux Bootloader fip.bin Contents 1    Background Description and Reference Materials. 2 1.1  Background Description. 2 1.2  Reference Materials. 3 2    S32G On-demand SMR Verification. 4 2.1  SMR Verify. 4 2.2  On-demand SMR Verify. 4 3    Build the Development Environment 5 3.1  EB Configuration. 5 3.2  ATF Compiling. 8 3.3  Burn Image. 9 4    Bootloader Codes Development 9 4.1  OnDemand SMR install 9 4.2  OnDemand SMR verify. 13 5    Testing. 16 5.1  Lauterbach Tracking. 16 5.2  Fip.bin Broken Test 19 5.3  Probe the Hardware. 19

This doc explain bootloader secure boot feature and how to re-develop it to support: .FW update .OTP attribute access .IVT protect: 目录 1 参考资料 .................................................................... 2 2 S32G Secure Boot说明 ............................................. 2 2.1 IVT头格式与Secure Boot相关 ................................ 3 2.2 Secure Boot流程 .................................................... 3 2.3 Secure Boot配置 .................................................... 4 2.4 Secure Boot涉及到的HSE内容 ............................... 6 3 环境搭建 .................................................................... 7 3.1 搭建编译环境 .......................................................... 7 3.2 IVT镜像制造 ........................................................... 7 3.3 镜像烧写 ................................................................. 8 3.4 Bootloader Secure Boot测试 .................................. 8 4 Bootloader Secure Boot代码与功能说明 ................... 9 4.1 EB配置说明： ........................................................ 9 4.2 EB生成代码说明： ............................................... 15 5 定制1：HSE FW update .......................................... 22 5.1 代码开发 ............................................................... 22 5.2 测试 ...................................................................... 25 6 定制2：HSE OTP Attribute设置 ............................... 26 6.1 代码开发 ............................................................... 26 6.2 模拟测试 ............................................................... 33 7 定制3：IVT签名 ....................................................... 35 7.1 代码开发 ............................................................... 35 7.2 模拟测试 ............................................................... 40 Contents 1 Reference Materials .................................................. 2 2 S32G Secure Boot ..................................................... 3 2.1 IVT header format for the Secure Boot part .......... 3 2.2 Secure Boot Flow ................................................... 3 2.3 Secure Boot Configuration ..................................... 4 2.4 HSE background of Secure Boot ........................... 6 3 Build the Project ........................................................ 7 3.1 Build the Compiling Environment ........................... 7 3.2 Create IVT Image ................................................... 7 3.3 Burning Image ........................................................ 8 3.4 Bootloader Secure Boot Testing ............................ 9 4 Bootloader Secure Boot Codes and Function Description 9 4.1 EB Configuration .................................................... 9 4.2 EB output codes ................................................... 15 5 Customization 1：HSE FW update ......................... 22 5.1 Codes development ............................................. 23 5.2 Testing ................................................................. 26 6 Customization 2：HSE OTP Attribute Setting ......... 26 6.1 Code Development .............................................. 27 6.2 Simulation test ...................................................... 34 7 Customization 3：IVT Signature ............................. 36 7.1 Codes Development ............................................. 36 7.2 Simulation Testing ................................................ 40  

Demo Wheel rotation is controlled by the SB0400 DC motor pre-driver. When the wheel is stopped manually, the Wheel Speed Sensor -KMI23- detects it & sends a signal to the SB0400 motor pre-driver & S32K MCU to activate the electromagnet Products 32-bit Automotive General Purpose MCUs|NXP Motorcycle Two-Wheel Antilock Braking (ABS)|NXP KMI23_KMI25|NXP  Links Motorcycle Two-Wheel Antilock Braking (ABS)|NXP  Analog Expert Software and Tools|NXP  Recommended product Link S32K144EVB https://www.nxp.com/design/development-boards/automotive-development-platforms/s32k-mcu-platforms/s32k144-evaluation-board:S32K144EVB?&fsrch=1&sr=1&pageNum=1

功能需求 RT117X系列MCU在汽车和工业类产品中有广泛应用，有很多客户对LIN通讯有需求，RT1176有12路独立的LPUART接口，最大支持的波特率能支持到20M，而且每一路都支持Break发送和中断接收，可以用来配合定时器实现LIN的主机和从机通讯。但是目前RT117X的EVK板没有放置LIN的收发器，SDK也没有相关LIN的示例代码和LIN协议栈支持，所以本示例目的是移植KW36工程中的LIN 2.1版本的代码到RT1176 EVK板子上，在硬件上通过跳线将LIN Master主节点和 Slave从节点的LPUART TX/RX线连接到FRDM-KW36板载的LIN收发器TJA1027上，分别实现LIN 2.1版本协议栈在Master和Slave节点的通讯功能验证，同时还需支持Auto Baud Rate自动波特率调整。为客户做二次开发或者移植用户自己的LINstack提供底层驱动，提高开发效率。 代码包软件   RT1176 LIN Master节点代码：RT1170_LIN_Porting_Demo_Master.7z RT1176 LIN Slave节点代码(支持自动波特率😞 RT1170_LIN_Porting_Demo_Slave_with_Auto_Baud_Rate.7z 配置FRDM-KW36板载LIN 收发器的代码: KW36_LIN_PHY_Board_Init.7z 硬件Setup   MIMXRT1170-EVK： 2pcs，分别用作LIN Master节点和Slave节点。 FRDM-KW36：2pcs， 分别用作Master节点的收发器，和 Slave节点的收发器 下图是系统连接，2块RT1170 EVK板分别和2块FRDM-KW36板通过Arduino接口连接在一起，然后将两块KW36之间的LIN收发器通过 J13 连接在一起，需要使用外部12V adapter为FRDM-KW36供电，否则板上的LIN收发器无法工作。特别强调的是，如果需要使能自动波特率检测的话，还需要将Slave节点RT1176 Arduino接口的J9-Pin2引脚连接到RT1176 Arduino接口的J9-Pin12引脚，作为Timer 脉冲捕捉的输入，即可完成系统硬件的setup。   软件Setup：   在以上硬件连接完成后，按照如下步骤下载对应软件： - Step1: 下载KW36_LIN_PHY_Board_Init.7z代码到两块FRDM-KW36板子上；  该代码中主要实现两个功能：第1个拉高板子的PTC5引脚，唤醒LIN收发器TJA1027。第2个将PTA18引脚配置成disable高阻状态。如果该引脚作为GPIO输出或者LPUART TX功能，会导致LIN slave回应数据出错(bit位丢失或者错误)。究其原因猜测应该是短路导致，当这个引脚作为GPIO输出或者LPUART TX功能，内部会有上拉，当RX1176 TX引脚输出Low时，由于电路上没有串联电阻(板子上使用的0Ω)，会导致引脚上出现大电流。尤其是第2个点，花费了很多时间去查这个问题，从波形去看，是有数据输出的，但只是数据不对，很具有迷惑性。当然如果客户是自己打的板子，板子上已经有LIN收发器就不需要这一步，直接跳到Step2即可。 - Step2: 下载RT1170_LIN_Porting_Demo_Master.7z代码到作为Master节点的IMRT1176-EVK板； - Step3: 下载RT1170_LIN_Porting_Demo_Slave_with_Auto_Baud_Rate.7z代码到作为Slave节点的IMRT1176-EVK板，如果需要使能自动波特率调整，需要配置宏linUserConfigSlave.autobaudEnable = true; 代码中默认是打开的。 实验结果   打开两个IMRT1176-EVK板串口，波特率配置115200，单击RT1176 Master节点上的按键SW7，便可以启动Master节点开始发送数据，通讯波形和串口打印信息如下两张图所示。   代码移植的几个难点   1. LIN通讯协议栈的调度流程的理解，包括Wakeup段，Break段，Sync段，PID段，Data段的状态切换和跳转，每个段的超时监测和错误处理，其核心思想有两个：一个在于LIN的RX引脚要不断去monitor TX引脚的状态，然后去切换状态机，具体调度的流程在后文会详细介绍，这里不展开。第二个是准确获取在每个段的定时器时间，尤其是超时超过一个overflow周期的情况，需要对timerGetTimeIntervalCallback0函数有理解。 2. 自动波特率调整功能的支持，该功能的原理是测量SYNC段的8个脉冲的脉宽，如果每个脉宽差异在2%范围内，再根据脉冲宽度去判断对应的波特率。在原来KW36的代码中是使用TPM的Overflow中断来作为计时，Edge中断来触发，而RT1176没有TPM，只能使用Qtimer (Qtimer功能上要更强于TPM)，但是不巧的是Qtimer不支持Overflow中断(参见芯片ERRATA 050194)，所以只能使用compare中断来实现类似的功能，而原有的计时定时计算都是基于overflow的，因此就需要对定时器部分的代码做大范围的更改。 应用中考虑到timerGetTimeIntervalCallback0函数在自动波特率调整时和超时监测处理时的一致性，最好使用同一个Timer的同一个channel，这就需要这个Timer既支持普通的定时中断模式，又支持input capture功能。对于TPM来说，是无法实现的因为两次在寄存器配置上时互斥的, 参见下图。幸运的是Qtimer支持这个feature，只是需要根据SDK代码做些配置 前面提到，需要QTimer支持input capture功能, 触发信号是LPUART_RX引脚的信号，需要硬件loop到Qtimer支持的硬件引脚上，对于KW36来说，只需要把这两个物理引脚连接在一起即可，但对RT1176来说, 只有这一步还不行，还需要对XBAR进行配置，将Qtimer的TIMER 1的触发引脚(合计有4个物理引脚)Link到QTIMER对应的Channel上，因为RT1176有4个QTimer，每个Qtimer有4个通道，标称的Qtimer trigger pin有4个，那具体哪个pin触发哪个QTimer的哪个通道，是需要配置的。如果客户没有使用过XBAR配置起来有难度，还好MCUXpresso config tool支持配置，可以简便的完成配置。示例代码和触发关系如下，如果实际硬件使用的物理引脚有区别，需要对应修改。 RT的XBAR功能非常强大，或许可以不使用外部的物理连线，直接将Qtimer的出发引脚的信号直接在内部Loop到LPUART_RX引脚，这样就更加灵活，此处只提供一个思路，不再进一步延伸。 IOMUXC_GPR->GPR15 = ((IOMUXC_GPR->GPR15 & (~(IOMUXC_GPR_GPR15_QTIMER4_TRM1_INPUT_SEL_MASK | IOMUXC_GPR_GPR15_QTIMER4_TRM2_INPUT_SEL_MASK)))/*Mask bits to zero which are setting*/ | IOMUXC_GPR_GPR15_QTIMER4_TRM1_INPUT_SEL(0x00U) /*QTIMER4 TMR1 input select: 0x00U*/ | IOMUXC_GPR_GPR15_QTIMER4_TRM2_INPUT_SEL(0x00U) /*QTIMER4 TMR2 input select: 0x00U*/ ); 4. 在状态机切换和超时以及错误处理过程中，经常会看到两种模式Sleep模式和Idle模式，区别是什么呢？ LIN_LPUART_GoToSleepMode: 函数会关闭Break中断，RX接收中断，帧错误中断，保留RX边沿 中断; LIN_LPUART_GotoIdleState 函数会打开Break中断，RX接收中断，帧错误中断，关闭RX边沿中 断; 实际通讯波形   Master作为Subscribe角色时，发送Header，由Slave发送Respone Master作为PUBLIC角色时，同时发送Header，以及Respone 按照调度表依次发送LI0_lin_configuration_RAM数组定义的PID数据 static uint8_t LI0_lin_configuration_RAM[LI0_LIN_SIZE_OF_CFG]= {0x00, 0x30, 0x33, 0x36, 0x2D, 0x3C, 0x3D ,0xFF}; Qtimer准确读取wake up信号的脉冲宽度 Slave使能Auto baud rate后读取到的每个脉冲宽度数据 免责声明： THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND *ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED *WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, *INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUTNOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, ORPROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY,WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE * OR OTHERWISE)

Demo Watch as the i.MX 8 development vehicle takes data in from the camera and uses one GPU and applies an image segmentation algorithm. The info is then fed to another GPU dedicated to a neural network inference engine which recognizes the traffic sign Products i.MX 8 Series Applications Processors|NXP  Training i.MX 8 Applications Processors Family Overview: i.MX 8, i.MX 8X, i.MX 8M  i.MX 8M Processor Overview and the Road Ahead  Micron’s Memory Solutions for the New i.MX 8 Microprocessor