I have a 2-lane MIPI connection on CSI port 0 of IMX8MP.
I am able to capture the data, however the image is garbage and I am trying to resolve it.
I have following DTS configuration:
&cameradev {
status = "okay";
cap_device {
status = "okay";
};
};
&i2c3 {
status = "okay";
lvds_bridge {
reg = <0x5A>;
status = "okay";
compatible = "lt9211c";
#address-cells = <0x1>;
#size-cells = <0x0>;
port {
lt9211c_ep: endpoint {
data-lanes = <1 2>;
clock-lanes = <0>;
bus-type = <4>;
clock-noncontinuous = <1>;
remote-endpoint = <&mipi_csi0_ep>;
clock-frequency = <74250000>; // Pixel clock in Hz (74.25 MHz)
hsync-active = <0>; // Sync polarity
vsync-active = <0>;
pclk-sample = <1>; // Sample on rising edge
};
};
};
};
&isi_0 {
status = "okay";
cap_device {
status = "okay";
};
m2m_device {
status = "disabled";
};
};
&isi_1 {
status = "disabled";
cap_device {
status = "okay";
};
};
&mipi_csi_0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_csi0_ep: endpoint {
remote-endpoint = <<9211c_ep>;
data-lanes = <2>;
csis-hs-settle = <4>;
csis-clk-settle = <2>;
csis-wclk;
bus-type = <4>; /* 4 = MIPI CSI-2 D-PHY */
};
};
};
Now you can see that data-lanes=<2> in mipi_csi0_ep: endpoint.
CSI driver imx8-mipi-csi2-sam.c has the following line to parse these data-lanes:
of_property_read_u32(node, "data-lanes", &state->num_lanes);Thus it is able to parse the 2 data lanes correctly.
However I see the following in the kernel logs:
[ 143.134848] mc: media_release: Media Release
[ 149.819027] mxc-mipi-csi2.0: mipi_csis_imx8mp_phy_reset: bus fmt is 12 bit !
[ 149.843365] Parent device name: 32e00000.isi
[ 149.869847] Parent device name: 32e00000.isi
[ 150.889587] mxc-mipi-csi2.0: mipi_csis_imx8mp_phy_reset: bus fmt is 12 bit !This warning comes from CSI driver in phy_reset function()
/* temporary place */
if (state->mix_gpr) {
if ((format.format.code == MEDIA_BUS_FMT_SRGGB8_1X8) ||
(format.format.code == MEDIA_BUS_FMT_SGRBG8_1X8) ||
(format.format.code == MEDIA_BUS_FMT_SGBRG8_1X8) ||
(format.format.code == MEDIA_BUS_FMT_SBGGR8_1X8)) {
mipi_csis_imx8mp_dewarp_ctl_data_type(state,
ISP_DEWARP_CTRL_DATA_TYPE_RAW8);
v4l2_dbg(1, debug, &state->sd,
"%s: bus fmt is 8 bit!\n", __func__);
} else if ((format.format.code == MEDIA_BUS_FMT_SRGGB10_1X10) ||
(format.format.code == MEDIA_BUS_FMT_SGRBG10_1X10) ||
(format.format.code == MEDIA_BUS_FMT_SGBRG10_1X10) ||
(format.format.code == MEDIA_BUS_FMT_SBGGR10_1X10)) {
mipi_csis_imx8mp_dewarp_ctl_data_type(state,
ISP_DEWARP_CTRL_DATA_TYPE_RAW10);
v4l2_dbg(1, debug, &state->sd,
"%s: bus fmt is 10 bit !\n", __func__);
} else {
mipi_csis_imx8mp_dewarp_ctl_data_type(state,
ISP_DEWARP_CTRL_DATA_TYPE_RAW12);
v4l2_dbg(1, debug, &state->sd,
"%s: bus fmt is 12 bit !\n", __func__);
}
goto write_regmap;
}
I tried to add the following to the first IF condition to force it to 8-bit and it did not solve any of my problem.
(format.format.code == MEDIA_BUS_FMT_SGRBG8_1X24) ||Can someone please clarify, what is the right way here?
Hello,
For that issue one can try to adjust clocks clocks and HSSETTLE parameter in imx8mn-evk.dts (hs-settle)
For testing please use Chapter 6. Camera Examples below document
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-GStreamer-User-Guide/ta-p/1098942
regards