wait instruction in MPC5633M

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wait instruction in MPC5633M

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pavelhavlik
Contributor I

Hello

 

I need to use 'wait' instruction with WC field equal 1. Opcode of the instruction according to

EREF 2.0: A Programmer’s Reference Manual for Freescale Power Architecture® Processors

and Power ISA™ Version 2.07

shall be:  0x7C20007C

But I'm getting program exception. Only when I use 0x7C00007C (wait with WC=0), no exception is generated.

Documents above read that if some WC other than 0 is not implemented, bahaviour of the instruction should equal to the one with WC = 0.

I'd like to ask if the instruction (wait with WC=1)  is really not implemented or if I do something wrong.

 

Thank you in advance

Pavel

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

The “wait 1,0” instruction (op code 0x7C20007C) is not implemented on the MPC563xM and the execution leads to the IVOR6 (illegal/unimplemented instruction exception).

So that sentence in the EREF RM is not valid for the MPC563xM.

Regards,

Petr

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

The “wait 1,0” instruction (op code 0x7C20007C) is not implemented on the MPC563xM and the execution leads to the IVOR6 (illegal/unimplemented instruction exception).

So that sentence in the EREF RM is not valid for the MPC563xM.

Regards,

Petr

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pavelhavlik
Contributor I

Petr,

thank you for the clarification.

Regards

Pavel

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