******************************************************************************** * Detailed Description:   * Example shows MCU's temperature measurement with the help of TSENS. * Calibration constants for TSENS are read from TSENS registers and * eQADC is set to measure Vbg and TSENS outputs. eQADC calibration is also done. * Calculated internal temperature can be displayed on the Terminal. * * See results on PC terminal (19200, 8N1, None). You should see following text * (with different values for sure) * *    fsys = 150MHz * *    TSENS temperature calculation * *    Calibration constants read from TSENS registers * *    T_LOW = 25 *    T_HIGH = 145 *    TSENS_CODE_T_LOW = 5441 *    TSENS_CODE_T_HIGH = 7305 *    VBG_CODE_T_LOW = 4010 * * *                 (TSENS_CODE_T*beta - TSENS_CODE_T_LOW)*(T_HIGH - T_LOW) *    T = T_LOW - --------------------------------------------------------- [degC] *                       (TSENS_CODE_T_HIGH - TSENS_CODE_T_LOW) * * *    VBG_CODE_T (ch45)  = 3959 => beta = 1.01288 *    TSENS_CODE_T (ch128) = 5608 * *    Temp = 31.80 degC *    * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT208S and XPC564AKIT324S * MCU:            SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * * Simple LINFlex UART mode transmit and receive without interrupts (polled UART) * TXFIFO and RXFIFO macro is used to select between buffer and FIFO mode * * EVB connection: * *   Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver *   Daughtercard: *   J17.11–12 ON  .. Connect LINFlexD_0 TXD (PB2) to main board. *   J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * *   Motherboard *   J14 - SCI_RX ON *   J13 - SCI_TX ON *   J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  RAM, internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

******************************************************************************** * Detailed Description: * * Example shows MCU's temperature measurement with the help of TSENS. * Calibartion constants for TSENS0 and TSENS1 are read from Test Flash and * ADC0/ADC1 is set to measure Vbg and TSENS outputs. * Calculated internal temperature can be desplayed on the Terminal. * * EVB connection: * *   Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver *   Daughtercard: *   J17.11–12 ON  .. Connect LINFlexD_0 TXD (PB2) to main board. *   J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * *   Motherboard *   J14 - SCI_RX ON *   J13 - SCI_TX ON *   J25 - SCI_PWR ON * * See results on PC terminal (19200, 8N1, None). You should get following text * (with different values for sure) * * TSENS0/TSENS1 temperature measurement * press any key to continue... * * Calibration constants read from Test Flash * * TSENS0                           TSENS1 * * K1 = 429                         K1 = -220 * K2 = -5785                       K2 = -5767 * K3 = -12800                      K3 = -12736 * K4 = 45                          K4 = 45 * *      K1 * Vbg_code * 2^-1 + K2 * TSENS_code * 2^3 * T = ------------------------------------------------------------------------- / 4 - 273.15 [degC] *     [K3 * Vbg_code * 2^2 + K4 * TSENS_code] * 2^-10 * * Vbg0_code      = 1502               Vbg1_code      = 1502 * TSENS0_code = 2002               TSENS1_code = 1988 * * TSENS0 temp = 34.57 degC         TSENS1 temp = 36.78 degC * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  RAM, internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example shows synchronization between eTimer, CTU and ADC modules. * The eTimer0 module timer 2 is initialized to generate PWM signal, and rising edge * of this signal is used to generate trigger signal for CTU module. The CTU module * use one command list with 4 ADC_0 channels. Single conversion mode is used, * so ADC0 ch0, ch1, ch2 and ch3 are sampled. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P8.1  - A[0]  .. GPIO output, used to see CTU-ADC ISR period * P9.1     - B[7]  .. ADC0 AN[0] input * P9.2     - B[8]  .. ADC0 AN[1] input * P16.4 - I[3] .. CTU0 EXT TRG output * * see CTU0 EXT TRG output signal (toggle on each trigger) on P16.4 with respect of eTimer PWM signals. * ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example shows usage of FlexPWM and Sine Wave generator (SGEN) modules. * The setting is selected in the way to have a PWM output signal synhronized with * SGEN output signal. This is necessary for resolver usage in motor control appls. * * See attached Excel sheet for calculation of parammeters used here (AUX0_clk_DIV0, * AUX0_clk_DIV1, SGEN_IOFREQ, PWM_PRESCALER, PWM_MODULO). * * This example is set for 2.44140625 kHz SGEN/PWM frequency. * * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P20.1 - D[7] .. SGEN output *          connected to FEC PHY's MIIMODE input on motherboard, *          to see full amplitude remove J26    * * P8.12    - A[11] .. FlexPWM A[0] output * P8.11    - A[10] .. FlexPWM B[0] output * * ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example shows synchronization between FlexPWM, CTU and ADC modules. * The FlexPWM Submodule 0 is initialized to generate PWM signal, and rising edge * of PWM B0 signal is used to generate trigger signal for CTU module. The CTU module * sends two commands to ADCs. Single conversion mode is used, so ADC0 ch0 and ch1 * are sampled. The conversion result is used to modify PWM B0 rising egde position * and change delay between external trigger and ADC sequence triggering. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P8.1  - A[0]  .. GPIO output, used to see CTU-ADC ISR period * P9.1     - B[7]  .. ADC0 AN[0] input * P9.2     - B[8]  .. ADC0 AN[1] input * P16.4 - I[3] .. CTU0 EXT TRG output   * P8.12    - A[11] .. FlexPWM A[0] output * P8.11    - A[10] .. FlexPWM B[0] output * * connect Trimmer J53.1 to P9.1 to change position of PWM B0 rising edge * connect Trimmer J53.1 to P9.2 to change CTU trigger delay from PWM B0 rising edge * * see CTU0 EXT TRG output signal (toggle on each trigger) on P16.4 with respect of PWM signals * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON) * by initialization of instruction/data cache and enabling of branch prediction. * Example suppose MCU is configured for DPM (Decoupled-parallel mode). * Its intention is to offer advanced startup code additional to CW stationery. * * ------------------------------------------------------------------------------ * Test HW:        MPC5675KEVB * MCU:            PPC5675KFMMSJ in Decoupled-parallel mode * Fsys:           180/150 MHz CORE_CLK * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * * Example gives possible implementation of input signal period/freq measurement. * eTimer channel capture 1 and 2 features are used. CAPT1/CAPT2 capture counter * value on rising/falling edge of input signal. The FIFO is set to 2 entries * and ICF2 is monitored. Free-running mode is used here. * * eTimer channel 0-1 are cascaded to achieve 1sec/1Hz measuring with 32bit counter.   * EVB connection: *   P8.2  - A[1]  .. eTimer0 channel1 input signal *   P8.1  - A[0]  .. GPIO output, used to show measurement period * *   Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver *   Daughtercard: *   J17.11–12 ON  .. Connect LINFlexD_0 TXD (PB2) to main board. *   J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * *   Motherboard *   J14 - SCI_RX ON *   J13 - SCI_TX ON *   J25 - SCI_PWR ON * * connect pulse signal to the P8.2. * See results on PC terminal (19200, 8N1, None). * Change freq/duty of input signal. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

******************************************************************************** * Detailed Description: * This example content a driver for ADC module. * Basic ADC functionality is demonstrated via ADC_0 normal conversion for ADC_0 AN0 channel. * * For closer details on how ADC works I suggest you to check reference manual. * This example sets system clock for 200MHz running from PLL0 module. * Example contains basic ADC functionality demonstration. Software is starting normal ADC conversion * on ADC_0 channel AN0. * To demonstrate the measurement functionality on Freescale MPC57xx motherboard connect jumper to J53. * By doing this the potentiometer is connected to AN0 ADC input. For further details see MPC57xx EVB schematics. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * * * Initializes the MCU including the FlexCAN peripherals. * Configures the FlexCAN to transmit and receive a CAN message. * * In this config, CAN_0 transmits a message. CAN_1 receives the message. * CAN_0 MB8 is configured to send data. CAN_0 sends message each 1sec. * This interval is generated by PIT. * CAN_1 MB9 is configured to receive a message, SW polling is used. * * to connect FlexCAN0 module (MCU's PB0/PB1 pins) to the motherboard's transceiver * with J5 CAN DB9 connector you have to: * - connect J17 2-6 on daughter board * - connect J17 5-3 on daughter board * This should be done as default   * To connect FlexCAN1 module (MCU's PA14/PA15 pins) to the motherboard's transceiver * with J6 CAN DB9 connector you have to: * - connect J37 2-3 on motherboard * - connect J38 2-3 on motherboard * * Connect CAN0-CANH on P15-1 to CAN1-CANH on P14-1 * Connect CAN0-CANL on P15-2 to CAN1-CANL on P14-2 * Terminate the CAN bus by connecting a 60 ohm resistor between CANH and CANL * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to use eDMA for transfering 32-bit data from internal flash to SRAM memory as well as how to configure AIPS (peripheral bridge) to grant eDMA access to peripherals. * * For closer details on how eDMA works I suggest you to check reference manual as this module is quite complex. * This example sets system clock for 200MHz running from PLL0 module. * The constant stored in internal flash is transfered via eDMA to SRAM memory. * Initialization functions are AIPS_0_Init for peripheral bridge and DMA_0_Init. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * * ------------------------------------------------------------------------------ * Test HW:  TRK-MPC5634M rev.B, SPC5634M * Maskset:  1M35Y * Target :  RAM * Terminal: no * Fsys:     64 MHz PLL with 8 MHz crystal reference * * 1. you have to use an external power supply to the board (SBC power)   2. The SBC chip must be initialized (via SPI interface) to turn on the CAN transceiver.   3. For ease of use, install the VSUP shunt on (jumper J5). This it to put 9 V on the SBC's DBG pin - refer to the SBC Data Sheet for more details about the DBG pin of the SBC chip.   4. This code initializes the MCU, then sends commands to the SBC chip over the SPI bus to turn on the CAN transceiver, then the FlexCAN_A module transmits a message out of the board.   I/O configuration for the TRK-MPC5634M CAN example:   SBC_TXD  (MPC5634M CANATX PCR[83] ALT1 function) SBC_RXD  (MPC5634M CANARX PCR[84] input function)   SPI bus between the MCU and SBC:   SBC_!CS    (MPC5634M DSPI_B CS0  ALT1 function PCR[105]) SBC_CLK    (MPC5634M DSPI_B SCK  ALT1 function PCR[102]) SBC_MOSI   (MPC5634M DSPI_B SOUT ALT1 function PCR[104]) SBC_MISO   (MPC5634M DSPI_B SIN  input function PCR[103])  * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to use FCCU module for fake fault injection in order to test FCCU functionality. * * For closer details on how FCCU works I suggest you to check reference manual as this module is quite complex. * This example sets system clock for 200MHz running from PLL0 module. * The FCCU_Fake_fault_inject function is setting and injecting FCCU fault NCF[7] - STCU2 fault condition. * Short reset is triggered as soon as FCCU registers injected fault. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to use PIT module for triggering interrupts on its timeout. * * This example shows how to use PIT module for triggering interrupts on its timeout. * For closer details on how PIT works I suggest you to check reference manual as this is quite simple timer. * This example sets PIT timer0 channel0 for 5000000 cycles. * As soon as it exceeds the interrupt is triggered. * Pin state is toggling in ISR * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON) * by initialization of instruction/data cache and enabling of branch prediction. * Example suppose MCU is configured for LSM (Lock-step mode). * Its intention is to offer advanced startup code additional to CW stationery. * * ------------------------------------------------------------------------------ * Test HW:        MPC5675KEVB * MCU:            PPC5675KFMMSJ in Lock-Step mode * Fsys:           180/150 MHz CORE_CLK * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop (by second core), initializes and display notice via UART terminal and * then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * For XPC567XKIT516 it initializes EBI for mounted external SRAM device. * * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC567xADAT516 Rev.D, MPC567XEVBFXMB Rev.C * MCU:             PPC5676RDMVY1 3N23A * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            180MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  ETPUC0(J24-0) -> USER_LED_8 (J5-8) *                  ETPUC1(J24-1) -> USER_LED_7 (J5-7)(to see blinking LEDs) * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * For XPC567XKIT516 it initializes EBI for mounted external SRAM device. * * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU:             PPC5674FMVYA264 * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            264/200/150/60 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  ETPUC0(J24-0) -> USER_LED_8 (J5-8) *                  ETPUC1(J24-1) -> USER_LED_7 (J5-7)(to see blinking LEDs) * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to reprogram the shadow flash. * * It is highly recommended to read application note "Preventing Device Lockout * via Censorship on MPC55xx and MPC563x Families" * http://www.freescale.com/files/32bit/doc/app_note/AN3787.pdf * * This examples erases the shadow flash, then it restores censorship information * and then NVUSRO nonvolatile register is reprogrammed to disable the watchdog. * The watchdog is disabled by clearing of bit WATCHDOG_EN in NVUSRO. It ensures * that watchdog is disabled automatically during startup of MCU. * Watchdog can be also disabled by software (shown in the code). * * It is important to execute the code from RAM memory because Read-While-Write * is not supported here. * * ------------------------------------------------------------------------------ * Test HW:  XPC56xxMB2 + XPC560B 144LQFP, SPC5604B, silicon mask set 2M27V * Target :  internal_FLASH, RAM * ********************************************************************************

The aim of the MPC5643L PWM triggered measurement concept is to introduce hardware  subsystem concept of autonomous triggering of ADC measurement by PWM module in desired time intervals and automatic storing of measured data into buffer located in SRAM. This autonomous measurement concept will offload the microprocessor’s core and presents the very precise way how to achieve the ADC time critical measurement synchronized with PWM signal generated by FlexPWM module.

This is simple example of the usage of Flash Array Integrity Check (FAIC) function that is available on all MPC56xx devices.   The FAIC reads data from selected and unlocked flash blocks and calculates the MISR signature. User can compare the MISR signature calculated by flash controller (in runtime) with MISR calculated by offline tool (this is done during development, not in runtime) from s-record file. If the MISR is identical, we know that the content of selected flash blocks corresponds to content in s-record file and that there are no ECC errors (single bit or double bit ECC errors).