Is it possible to set more than 6 breakpoint for LPC1768 in LPCXpresso

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Is it possible to set more than 6 breakpoint for LPC1768 in LPCXpresso

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chaitanyapravee
Contributor II

Hi,

I am using lpc1768 based board in lpcxpresso v8.2.2. I am using LPC-LINK2 for debugging. As per the LPC176x/5x user manual, a total of 8 hardware breakpoints available. 6 for instructions and 2 for literal values. I am able to set 6 breakpoints in my code.

Is it possible to set other 2 breakpoints?

If it is possible how do I set them?

Is the IDE using them internally for any other purpose?

If it is using, for which purpose it is using?

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lpcxpresso_supp
NXP Employee
NXP Employee

The current version of the FAQ is at: How many breakpoints or watchpoints can I set? 

For LPC175x/6x, there are only 6 units inside the Cortex-M3's debug logic for trapping instructions - so you can only set a maximum of 6 breakpoints on instructions in flash. The debugger will in many circumstances still be able to single step, but not always (depending on the code you are stepping).

Aside : for information on watchpoints see : How to use Watchpoints 

If you need more than 6 breakpoints, then you would need to relocate the code into RAM : https://community.nxp.com/message/630746 

Regards,

LPCXpresso Support

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thefallguy
Contributor IV

For code running in RAM, the debugger can 'insert' breakpoint instructions directly in to the RAM (actually, it replaces the instruction with a breakpoint, remembering what it replaced, so that it can be restored). Thus for RAM code, an infinite number of breakpoints are possible. This is not possible for Flash and so you need hardware support, in the form of breakpoint registers which cause the processor to break at a certain address (and for which there are 6 with a Cortex-M3).

Hope that helps you understand.

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chaitanyapravee
Contributor II

Dear Fall Guy,

First of all thank you very much for your valuable input.  

My hardware supports single stepping so I can understand single stepping the assembly code but when we request for "step into/step over/step return", it actually executes couple of assembly instructions and halts the processor.

How does the debugger implement the "step into/step over/step return" when a request is raised from the user?

Could you help me understand this as well?

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lpcxpresso_supp
NXP Employee
NXP Employee

The current version of the FAQ is at: How many breakpoints or watchpoints can I set? 

For LPC175x/6x, there are only 6 units inside the Cortex-M3's debug logic for trapping instructions - so you can only set a maximum of 6 breakpoints on instructions in flash. The debugger will in many circumstances still be able to single step, but not always (depending on the code you are stepping).

Aside : for information on watchpoints see : How to use Watchpoints 

If you need more than 6 breakpoints, then you would need to relocate the code into RAM : https://community.nxp.com/message/630746 

Regards,

LPCXpresso Support

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chaitanyapravee
Contributor II
 Relocating code from FLASH to RAM mentions about software breakpoints.
how the debugger implements these, for code located, in RAM ??
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converse
Senior Contributor V
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chaitanyapravee
Contributor II

Dear Con Verse,

According to LPC176x/5x user manual 8 hardware breakpoints available on chip.

I understand that only 6 hardware breakpoints can be set for the code running from the flash.

Is there any other way that I can set the remaining 2 breakpoints from the IDE?

From the How many breakpoints or watchpoints can I set? | www.LPCware.com   A breakpoint may also be required (temporarily) when single stepping your code.

If I set 6 breakpoints in the code, does the single stepping work? 

But the single stepping still works for me.

Does the IDE use the one of the remaining 2 breakpoints on the chip for single stepping?

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