ARM GAS /tmp/ccSGB01A.s page 1
1 .syntax unified
2 .cpu cortex-m3
3 .fpu softvfp
4 .eabi_attribute 20, 1
5 .eabi_attribute 21, 1
6 .eabi_attribute 23, 3
7 .eabi_attribute 24, 1
8 .eabi_attribute 25, 1
9 .eabi_attribute 26, 1
10 .eabi_attribute 30, 4
11 .eabi_attribute 34, 1
12 .eabi_attribute 18, 4
13 .thumb
14 .file"main.c"
15 .text
16 .Ltext0:
17 .cfi_sections.debug_frame
18 .section.text.HardFault_Handler,"ax",%progbits
19 .align1
20 .globalHardFault_Handler
21 .thumb
22 .thumb_func
24 HardFault_Handler:
25 .LFB55:
26 .file 1 "main.c"
1:main.c **** #include "lpc177x_8x_gpio.h"
2:main.c **** #include "lpc177x_8x_timer.h"
3:main.c **** #include "lpc177x_8x_uart.h"
4:main.c **** #include "lpc177x_8x_clkpwr.h"
5:main.c **** #include "core_cm3.h"
6:main.c ****
7:main.c ****
8:main.c **** void HardFault_Handler(void)
9:main.c **** {
27 .loc 1 9 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 32
30 @ frame_needed = 0, uses_anonymous_args = 0
31 0000 70B5 push{r4, r5, r6, lr}
32 .LCFI0:
33 .cfi_def_cfa_offset 16
34 .cfi_offset 4, -16
35 .cfi_offset 5, -12
36 .cfi_offset 6, -8
37 .cfi_offset 14, -4
38 0002 88B0 subsp, sp, #32
39 .LCFI1:
40 .cfi_def_cfa_offset 48
10:main.c **** uint32_t bfar = SCB->BFAR;
41 .loc 1 10 0
42 0004 404B ldrr3, .L26
43 0006 9C6B ldrr4, [r3, #56]
44 .LVL0:
11:main.c **** uint32_t reg;
12:main.c **** uint8_t regval[12];
13:main.c **** regval[0] = '0';
45 .loc 1 13 0
ARM GAS /tmp/ccSGB01A.s page 2
46 0008 3023 movsr3, #48
47 000a 8DF80830 strbr3, [sp, #8]
14:main.c **** regval[1] = 'x';
48 .loc 1 14 0
49 000e 7823 movsr3, #120
50 0010 8DF80930 strbr3, [sp, #9]
15:main.c **** regval[11] = '\r';
51 .loc 1 15 0
52 0014 0D23 movsr3, #13
53 0016 8DF81330 strbr3, [sp, #19]
16:main.c **** regval[10] = '\n';
54 .loc 1 16 0
55 001a 0A23 movsr3, #10
56 001c 8DF81230 strbr3, [sp, #18]
57 .L2:
17:main.c ****
18:main.c **** while(1)
19:main.c **** {
20:main.c **** //Bus fault
21:main.c **** if(SCB->CFSR & SCB_CFSR_BUSFAULTSR_Msk)
58 .loc 1 21 0
59 0020 394B ldrr3, .L26
60 0022 986A ldrr0, [r3, #40]
61 0024 10F47F46 andsr6, r0, #65280
62 0028 4ED0 beq.L3
63 .LBB5:
22:main.c **** {
23:main.c **** reg = SCB->CFSR;
24:main.c **** uint8_t msg[] = "bus fault: ";
64 .loc 1 24 0
65 002a 384A ldrr2, .L26+4
23:main.c **** reg = SCB->CFSR;
66 .loc 1 23 0
67 002c 9D6A ldrr5, [r3, #40]
68 .LVL1:
69 .loc 1 24 0
70 002e 1068 ldrr0, [r2]@ unaligned
71 0030 5168 ldrr1, [r2, #4]@ unaligned
72 0032 05AB addr3, sp, #20
73 0034 03C3 stmiar3!, {r0, r1}
74 0036 9068 ldrr0, [r2, #8]@ unaligned
25:main.c **** UART_Send(UART_0, msg, 11, BLOCKING);
75 .loc 1 25 0
76 0038 05A9 addr1, sp, #20
24:main.c **** uint8_t msg[] = "bus fault: ";
77 .loc 1 24 0
78 003a 1860 strr0, [r3]@ unaligned
79 .loc 1 25 0
80 003c 0B22 movsr2, #11
81 003e 0123 movsr3, #1
82 0040 0020 movsr0, #0
83 0042 FFF7FEFF blUART_Send
84 .LVL2:
85 0046 0023 movsr3, #0
86 .LVL3:
87 .L7:
88 0048 9A00 lslsr2, r3, #2
ARM GAS /tmp/ccSGB01A.s page 3
89 004a C2F11C02 rsbr2, r2, #28
90 .LBB6:
26:main.c ****
27:main.c **** char i;
28:main.c **** for(i = 0; i < 8; i++)
29:main.c **** {
30:main.c **** uint8_t nibble = (reg>>4*(7-i)) & 0x0f;
91 .loc 1 30 0
92 004e 25FA02F2 lsrr2, r5, r2
93 0052 02A9 addr1, sp, #8
94 0054 02F00F02 andr2, r2, #15
95 .LVL4:
31:main.c **** regval[i+2] = nibble < 10 ? nibble + '0' : nibble + 'a' - 10;
96 .loc 1 31 0
97 0058 092A cmpr2, #9
98 005a 1944 addr1, r1, r3
99 005c 03F10103 addr3, r3, #1
100 .LVL5:
101 0060 94BF itels
102 0062 3032 addlsr2, r2, #48
103 .LVL6:
104 0064 5732 addhir2, r2, #87
105 .LBE6:
28:main.c **** for(i = 0; i < 8; i++)
106 .loc 1 28 0
107 0066 082B cmpr3, #8
108 .LBB7:
109 .loc 1 31 0
110 0068 8A70 strbr2, [r1, #2]
111 .LVL7:
112 .LBE7:
28:main.c **** for(i = 0; i < 8; i++)
113 .loc 1 28 0
114 006a EDD1 bne.L7
32:main.c **** }
33:main.c ****
34:main.c **** UART_Send(UART_0, regval, 12, BLOCKING);
115 .loc 1 34 0
116 006c 0123 movsr3, #1
117 .LVL8:
118 006e 0020 movsr0, #0
119 0070 02A9 addr1, sp, #8
120 0072 0C22 movsr2, #12
121 0074 FFF7FEFF blUART_Send
122 .LVL9:
35:main.c ****
36:main.c **** //If BFAR is valid
37:main.c **** if(reg & 1<<15)
123 .loc 1 37 0
124 0078 2B04 lslsr3, r5, #16
125 007a D1D5 bpl.L2
126 .LBB8:
38:main.c **** {
39:main.c **** uint8_t msg[] = "BFAR: ";
127 .loc 1 39 0
128 007c 244B ldrr3, .L26+8
40:main.c **** UART_Send(UART_0, msg, 6, BLOCKING);
ARM GAS /tmp/ccSGB01A.s page 4
129 .loc 1 40 0
130 007e 6946 movr1, sp
39:main.c **** uint8_t msg[] = "BFAR: ";
131 .loc 1 39 0
132 0080 1868 ldrr0, [r3]@ unaligned
133 0082 9A88 ldrhr2, [r3, #4]@ unaligned
134 0084 9B79 ldrbr3, [r3, #6]@ zero_extendqisi2
135 0086 0090 strr0, [sp]@ unaligned
136 0088 ADF80420 strhr2, [sp, #4]@ unaligned
137 008c 8DF80630 strbr3, [sp, #6]
138 .loc 1 40 0
139 0090 0020 movsr0, #0
140 0092 0123 movsr3, #1
141 0094 0622 movsr2, #6
142 0096 FFF7FEFF blUART_Send
143 .LVL10:
144 009a 0023 movsr3, #0
145 .LVL11:
146 .L12:
147 009c 9A00 lslsr2, r3, #2
148 009e C2F11C02 rsbr2, r2, #28
149 .LBB9:
41:main.c ****
42:main.c **** char i;
43:main.c **** for(i = 0; i < 8; i++)
44:main.c **** {
45:main.c **** uint8_t nibble = (bfar>>4*(7-i)) & 0x0f;
150 .loc 1 45 0
151 00a2 24FA02F2 lsrr2, r4, r2
152 00a6 02A9 addr1, sp, #8
153 00a8 02F00F02 andr2, r2, #15
154 .LVL12:
46:main.c **** regval[i+2] = nibble < 10 ? nibble + '0' : nibble + 'a' - 10;
155 .loc 1 46 0
156 00ac 092A cmpr2, #9
157 00ae 1944 addr1, r1, r3
158 00b0 03F10103 addr3, r3, #1
159 .LVL13:
160 00b4 94BF itels
161 00b6 3032 addlsr2, r2, #48
162 .LVL14:
163 00b8 5732 addhir2, r2, #87
164 .LBE9:
43:main.c **** for(i = 0; i < 8; i++)
165 .loc 1 43 0
166 00ba 082B cmpr3, #8
167 .LBB10:
168 .loc 1 46 0
169 00bc 8A70 strbr2, [r1, #2]
170 .LVL15:
171 .LBE10:
43:main.c **** for(i = 0; i < 8; i++)
172 .loc 1 43 0
173 00be EDD1 bne.L12
47:main.c **** }
48:main.c ****
49:main.c **** UART_Send(UART_0, regval, 12, BLOCKING);
ARM GAS /tmp/ccSGB01A.s page 5
174 .loc 1 49 0
175 00c0 0020 movsr0, #0
176 00c2 02A9 addr1, sp, #8
177 00c4 0C22 movsr2, #12
178 00c6 1BE0 b.L24
179 .LVL16:
180 .L3:
181 .LBE8:
182 .LBE5:
50:main.c **** }
51:main.c **** }
52:main.c **** //Memory fault
53:main.c **** else if(SCB->CFSR & SCB_CFSR_MEMFAULTSR_Msk)
183 .loc 1 53 0
184 00c8 9A6A ldrr2, [r3, #40]
185 00ca 12F0FF05 andsr5, r2, #255
186 00ce 08D0 beq.L14
187 .LBB11:
54:main.c **** {
55:main.c **** uint8_t msg[] = "mem fault\n\r";
188 .loc 1 55 0
189 00d0 104A ldrr2, .L26+12
190 00d2 05AB addr3, sp, #20
191 00d4 1068 ldrr0, [r2]@ unaligned
192 00d6 5168 ldrr1, [r2, #4]@ unaligned
193 00d8 03C3 stmiar3!, {r0, r1}
194 00da 9068 ldrr0, [r2, #8]@ unaligned
195 00dc 1860 strr0, [r3]@ unaligned
56:main.c **** UART_Send(UART_0, msg, 11, BLOCKING);
196 .loc 1 56 0
197 00de 3046 movr0, r6
198 00e0 0CE0 b.L23
199 .L14:
200 .LBE11:
57:main.c **** }
58:main.c **** //Usage fault
59:main.c **** else if(SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk)
201 .loc 1 59 0
202 00e2 9B6A ldrr3, [r3, #40]
203 00e4 1B0C lsrsr3, r3, #16
204 00e6 1B04 lslsr3, r3, #16
205 00e8 002B cmpr3, #0
206 00ea 99D0 beq.L2
207 .LBB12:
60:main.c **** {
61:main.c **** uint8_t msg[] = "usg fault\n\r";
208 .loc 1 61 0
209 00ec 0A4A ldrr2, .L26+16
210 00ee 05AB addr3, sp, #20
211 00f0 1068 ldrr0, [r2]@ unaligned
212 00f2 5168 ldrr1, [r2, #4]@ unaligned
213 00f4 03C3 stmiar3!, {r0, r1}
214 00f6 9068 ldrr0, [r2, #8]@ unaligned
215 00f8 1860 strr0, [r3]@ unaligned
62:main.c **** UART_Send(UART_0, msg, 11, BLOCKING);
216 .loc 1 62 0
217 00fa 2846 movr0, r5
ARM GAS /tmp/ccSGB01A.s page 6
218 .L23:
219 00fc 05A9 addr1, sp, #20
220 00fe 0B22 movsr2, #11
221 .L24:
222 0100 0123 movsr3, #1
223 0102 FFF7FEFF blUART_Send
224 .LVL17:
225 0106 8BE7 b.L2
226 .L27:
227 .align2
228 .L26:
229 0108 00ED00E0 .word-536810240
230 010c 00000000 .word.LC0
231 0110 0C000000 .word.LC1
232 0114 13000000 .word.LC2
233 0118 1F000000 .word.LC3
234 .LBE12:
235 .cfi_endproc
236 .LFE55:
238 .section.text.uart_get_pointer,"ax",%progbits
239 .align1
240 .globaluart_get_pointer
241 .thumb
242 .thumb_func
244 uart_get_pointer:
245 .LFB56:
63:main.c **** }
64:main.c **** }
65:main.c ****
66:main.c **** }
67:main.c ****
68:main.c ****
69:main.c ****
70:main.c **** LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID)
71:main.c **** {
246 .loc 1 71 0
247 .cfi_startproc
248 @ args = 0, pretend = 0, frame = 0
249 @ frame_needed = 0, uses_anonymous_args = 0
250 @ link register save eliminated.
251 .LVL18:
252 .LVL19:
253 0000 0328 cmpr0, #3
254 0002 9ABF ittels
255 0004 024B ldrlsr3, .L31
256 0006 53F82000 ldrlsr0, [r3, r0, lsl #2]
257 .LVL20:
258 .loc 1 71 0
259 000a 0020 movhir0, #0
260 .LVL21:
72:main.c **** LPC_UART_TypeDef *UARTx = NULL;
73:main.c **** switch(UartID)
74:main.c **** {
75:main.c **** case UART_0:
76:main.c **** UARTx = LPC_UART0;
77:main.c **** break;
78:main.c **** case UART_2:
ARM GAS /tmp/ccSGB01A.s page 7
79:main.c **** UARTx = LPC_UART2;
80:main.c **** break;
81:main.c **** case UART_3:
82:main.c **** UARTx = LPC_UART3;
83:main.c **** break;
84:main.c **** default:
85:main.c **** break;
86:main.c **** }
87:main.c **** return UARTx;
88:main.c **** }
261 .loc 1 88 0
262 000c 7047 bxlr
263 .L32:
264 000e 00BF .align2
265 .L31:
266 0010 00000000 .word.LANCHOR0
267 .cfi_endproc
268 .LFE56:
270 .global__aeabi_uldivmod
271 .section.text.uart_set_divisors,"ax",%progbits
272 .align1
273 .globaluart_set_divisors
274 .thumb
275 .thumb_func
277 uart_set_divisors:
278 .LFB57:
89:main.c ****
90:main.c ****
91:main.c **** Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate)
92:main.c **** {
279 .loc 1 92 0
280 .cfi_startproc
281 @ args = 0, pretend = 0, frame = 48
282 @ frame_needed = 0, uses_anonymous_args = 0
283 .LVL22:
284 0000 2DE9F04F push{r4, r5, r6, r7, r8, r9, r10, fp, lr}
285 .LCFI2:
286 .cfi_def_cfa_offset 36
287 .cfi_offset 4, -36
288 .cfi_offset 5, -32
289 .cfi_offset 6, -28
290 .cfi_offset 7, -24
291 .cfi_offset 8, -20
292 .cfi_offset 9, -16
293 .cfi_offset 10, -12
294 .cfi_offset 11, -8
295 .cfi_offset 14, -4
296 0004 8DB0 subsp, sp, #52
297 .LCFI3:
298 .cfi_def_cfa_offset 88
299 .LVL23:
300 .loc 1 92 0
301 0006 0746 movr7, r0
93:main.c **** Status errorStatus = ERROR;
94:main.c ****
95:main.c **** uint32_t uClk;
96:main.c **** uint32_t d, m, bestd, bestm, tmp;
ARM GAS /tmp/ccSGB01A.s page 8
97:main.c **** UNS_64 best_divisor, divisor;
98:main.c **** uint32_t current_error, best_error;
99:main.c **** uint32_t recalcbaud;
100:main.c ****
101:main.c **** /* get UART block clock */
102:main.c **** uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
302 .loc 1 102 0
303 0008 0120 movsr0, #1
304 .LVL24:
92:main.c **** {
305 .loc 1 92 0
306 000a 0C46 movr4, r1
307 .loc 1 102 0
308 000c FFF7FEFF blCLKPWR_GetCLK
309 .LVL25:
103:main.c ****
104:main.c **** /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
105:main.c **** * The formula is :
106:main.c **** * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
107:main.c **** * It involves floating point calculations. That's the reason the formulae are adjusted with
108:main.c **** * Multiply and divide method.*/
109:main.c ****
110:main.c **** /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
111:main.c **** * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
112:main.c **** best_error = 0xFFFFFFFF; /* Worst case */
113:main.c **** bestd = 0;
114:main.c **** bestm = 0;
115:main.c **** best_divisor = 0;
116:main.c ****
117:main.c **** for (m = 1 ; m <= 15 ;m++)
118:main.c **** {
119:main.c **** for (d = 0 ; d < m ; d++)
120:main.c **** {
121:main.c **** divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d));
310 .loc 1 121 0
311 0010 0109 lsrsr1, r0, #4
312 0012 0207 lslsr2, r0, #28
313 0014 0391 strr1, [sp, #12]
314 0016 0292 strr2, [sp, #8]
102:main.c **** uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
315 .loc 1 102 0
316 0018 8446 movip, r0
317 .LVL26:
114:main.c **** bestm = 0;
318 .loc 1 114 0
319 001a 0025 movsr5, #0
320 .loc 1 121 0
321 001c DDE90201 ldrdr0, [sp, #8]
322 .LVL27:
323 0020 CDE90401 strdr0, [sp, #16]
112:main.c **** best_error = 0xFFFFFFFF; /* Worst case */
324 .loc 1 112 0
325 0024 4FF0FF31 movr1, #-1
326 .loc 1 121 0
327 0028 0994 strr4, [sp, #36]
117:main.c **** for (m = 1 ; m <= 15 ;m++)
328 .loc 1 117 0
ARM GAS /tmp/ccSGB01A.s page 9
329 002a 0126 movsr6, #1
112:main.c **** best_error = 0xFFFFFFFF; /* Worst case */
330 .loc 1 112 0
331 002c 0891 strr1, [sp, #32]
115:main.c **** best_divisor = 0;
332 .loc 1 115 0
333 002e 4FF0000A movr10, #0
334 0032 4FF0000B movfp, #0
113:main.c **** bestd = 0;
335 .loc 1 113 0
336 0036 0095 strr5, [sp]
337 .LVL28:
338 .L34:
92:main.c **** {
339 .loc 1 92 0 discriminator 1
340 0038 0999 ldrr1, [sp, #36]
341 003a 0022 movsr2, #0
342 003c 0791 strr1, [sp, #28]
343 003e 0692 strr2, [sp, #24]
344 .LVL29:
345 .L40:
346 .loc 1 121 0
347 0040 DDF81C80 ldrr8, [sp, #28]
348 0044 4FF00009 movr9, #0
349 0048 4246 movr2, r8
350 004a 4B46 movr3, r9
351 004c DDE90401 ldrdr0, [sp, #16]
352 0050 CDF804C0 strip, [sp, #4]
353 0054 FFF7FEFF bl__aeabi_uldivmod
354 .LVL30:
122:main.c **** current_error = divisor & 0xFFFFFFFF;
123:main.c ****
124:main.c **** tmp = divisor>>32;
125:main.c ****
126:main.c **** /* Adjust error */
127:main.c **** if(current_error > ((uint32_t)1<<31))
355 .loc 1 127 0
356 0058 B0F1004F cmpr0, #-2147483648
124:main.c **** tmp = divisor>>32;
357 .loc 1 124 0
358 005c 0A46 movr2, r1
128:main.c **** {
129:main.c **** current_error = -current_error;
130:main.c **** tmp++;
359 .loc 1 130 0
360 005e 88BF ithi
361 0060 4A1C addhir2, r1, #1
131:main.c **** }
132:main.c ****
133:main.c **** /* Out of range */
134:main.c **** if(tmp < 1 || tmp > 65536)
362 .loc 1 134 0
363 0062 02F1FF31 addr1, r2, #-1
122:main.c **** current_error = divisor & 0xFFFFFFFF;
364 .loc 1 122 0
365 0066 0346 movr3, r0
129:main.c **** current_error = -current_error;
ARM GAS /tmp/ccSGB01A.s page 10
366 .loc 1 129 0
367 0068 88BF ithi
368 006a 4342 rsbhir3, r0, #0
369 .LVL31:
370 .loc 1 134 0
371 006c B1F5803F cmpr1, #65536
127:main.c **** if(current_error > ((uint32_t)1<<31))
372 .loc 1 127 0
373 0070 DDF804C0 ldrip, [sp, #4]
374 .LVL32:
375 .loc 1 134 0
376 0074 0AD2 bcs.L36
135:main.c **** continue;
136:main.c ****
137:main.c **** if( current_error < best_error)
377 .loc 1 137 0
378 0076 0898 ldrr0, [sp, #32]
379 .LVL33:
380 0078 8342 cmpr3, r0
381 007a 07D2 bcs.L36
382 .LVL34:
138:main.c **** {
139:main.c **** best_error = current_error;
140:main.c **** best_divisor = tmp;
383 .loc 1 140 0
384 007c 9246 movr10, r2
385 007e 4FF0000B movfp, #0
386 .LVL35:
141:main.c **** bestd = d;
142:main.c **** bestm = m;
143:main.c ****
144:main.c **** if(best_error == 0)
387 .loc 1 144 0
388 0082 03B3 cbzr3, .L47
389 0084 0699 ldrr1, [sp, #24]
390 0086 0893 strr3, [sp, #32]
391 0088 3546 movr5, r6
392 008a 0091 strr1, [sp]
393 .LVL36:
394 .L36:
119:main.c **** for (d = 0 ; d < m ; d++)
395 .loc 1 119 0
396 008c 069A ldrr2, [sp, #24]
397 .LVL37:
398 008e 079B ldrr3, [sp, #28]
399 .LVL38:
400 0090 0132 addsr2, r2, #1
401 0092 2344 addr3, r3, r4
402 0094 B242 cmpr2, r6
403 0096 0692 strr2, [sp, #24]
404 .LVL39:
405 0098 0793 strr3, [sp, #28]
406 009a D1D3 bcc.L40
145:main.c **** break;
146:main.c **** }
147:main.c **** } /* end of inner for loop */
148:main.c ****
ARM GAS /tmp/ccSGB01A.s page 11
149:main.c **** if (best_error == 0)
407 .loc 1 149 0
408 009c 0898 ldrr0, [sp, #32]
409 009e 70B1 cbzr0, .L39
410 00a0 0999 ldrr1, [sp, #36]
411 00a2 DDE90423 ldrdr2, [sp, #16]
412 .LVL40:
413 00a6 2144 addr1, r1, r4
117:main.c **** for (m = 1 ; m <= 15 ;m++)
414 .loc 1 117 0
415 00a8 0136 addsr6, r6, #1
416 .LVL41:
417 00aa 0991 strr1, [sp, #36]
418 00ac DDE90201 ldrdr0, [sp, #8]
419 00b0 1218 addsr2, r2, r0
420 00b2 43EB0103 adcr3, r3, r1
421 00b6 102E cmpr6, #16
422 00b8 CDE90423 strdr2, [sp, #16]
423 00bc BCD1 bne.L34
424 .L39:
425 .LVL42:
150:main.c **** break;
151:main.c **** } /* end of outer for loop */
152:main.c ****
153:main.c **** /* can not find best match */
154:main.c **** if(best_divisor == 0)
426 .loc 1 154 0
427 00be 5AEA0B03 orrsr3, r10, fp
428 00c2 69D0 beq.L51
429 00c4 02E0 b.L37
430 .LVL43:
431 .L47:
432 00c6 0698 ldrr0, [sp, #24]
433 00c8 3546 movr5, r6
434 00ca 0090 strr0, [sp]
435 .LVL44:
436 .L37:
155:main.c **** {
156:main.c **** return ERROR;
157:main.c **** }
158:main.c ****
159:main.c **** recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd));
437 .loc 1 159 0
438 00cc 0099 ldrr1, [sp]
439 00ce 4FEA1C13 lsrr3, ip, #4
440 00d2 2944 addr1, r1, r5
441 00d4 03FB05F0 mulr0, r3, r5
442 00d8 A1FB0A23 umullr2, r3, r1, r10
443 00dc 01FB0B33 mlar3, r1, fp, r3
444 00e0 0021 movsr1, #0
445 00e2 FFF7FEFF bl__aeabi_uldivmod
446 .LVL45:
160:main.c ****
161:main.c **** /* reuse best_error to evaluate baud error*/
162:main.c **** if(baudrate > recalcbaud)
447 .loc 1 162 0
448 00e6 8442 cmpr4, r0
ARM GAS /tmp/ccSGB01A.s page 12
163:main.c **** best_error = baudrate - recalcbaud;
449 .loc 1 163 0
450 00e8 8CBF itehi
451 00ea C0EB0400 rsbhir0, r0, r4
452 .LVL46:
164:main.c **** else
165:main.c **** best_error = recalcbaud -baudrate;
453 .loc 1 165 0
454 00ee C4EB0000 rsblsr0, r4, r0
455 .LVL47:
166:main.c ****
167:main.c **** best_error = best_error * 100 / baudrate;
456 .loc 1 167 0
457 00f2 6423 movsr3, #100
458 00f4 5843 mulsr0, r3, r0
459 .LVL48:
460 00f6 B0FBF4F4 udivr4, r0, r4
461 .LVL49:
168:main.c ****
169:main.c **** if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
462 .loc 1 169 0
463 00fa 022C cmpr4, #2
464 00fc 4CD8 bhi.L51
465 00fe DDF80080 ldrr8, [sp]
170:main.c **** {
171:main.c **** if (UartID == UART_1)
466 .loc 1 171 0
467 0102 012F cmpr7, #1
468 0104 4FEA0B60 lslr0, fp, #24
469 0108 5FFA8AF1 uxtbr1, r10
470 010c 4FEA0515 lslr5, r5, #4
471 .LVL50:
472 0110 08F00F09 andr9, r8, #15
473 0114 0FD1 bne.L44
172:main.c **** {
173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN;
474 .loc 1 173 0
475 0116 224C ldrr4, .L57
476 .LVL51:
174:main.c ****
175:main.c **** LPC_UART1->DLM = UART_LOAD_DLM(best_divisor);
477 .loc 1 175 0
478 0118 4FEA1A22 lsrr2, r10, #8
173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN;
479 .loc 1 173 0
480 011c 237B ldrbr3, [r4, #12]@ zero_extendqisi2
481 .loc 1 175 0
482 011e 0243 orrsr2, r2, r0
173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN;
483 .loc 1 173 0
484 0120 43F08003 orrr3, r3, #128
485 .loc 1 175 0
486 0124 D2B2 uxtbr2, r2
173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN;
487 .loc 1 173 0
488 0126 2373 strbr3, [r4, #12]
489 .LVL52:
ARM GAS /tmp/ccSGB01A.s page 13
490 .loc 1 175 0
491 0128 2271 strbr2, [r4, #4]
176:main.c ****
177:main.c **** LPC_UART1->DLL = UART_LOAD_DLL(best_divisor);
492 .loc 1 177 0
493 012a 2170 strbr1, [r4]
178:main.c ****
179:main.c **** /* Then reset DLAB bit */
180:main.c **** LPC_UART1->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
494 .loc 1 180 0
495 012c 237B ldrbr3, [r4, #12]@ zero_extendqisi2
496 012e 03F07F03 andr3, r3, #127
497 0132 2373 strbr3, [r4, #12]
498 0134 10E0 b.L56
499 .LVL53:
500 .L44:
181:main.c ****
182:main.c **** LPC_UART1->FDR = (UART_FDR_MULVAL(bestm)
183:main.c **** | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
184:main.c **** }
185:main.c **** else if (UartID == UART_4)
501 .loc 1 185 0
502 0136 042F cmpr7, #4
503 0138 13D1 bne.L45
186:main.c **** {
187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN;
504 .loc 1 187 0
505 013a 1A4C ldrr4, .L57+4
506 .LVL54:
188:main.c ****
189:main.c **** LPC_UART4->DLM = UART_LOAD_DLM(best_divisor);
507 .loc 1 189 0
508 013c 4FEA1A22 lsrr2, r10, #8
187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN;
509 .loc 1 187 0
510 0140 E368 ldrr3, [r4, #12]
511 .loc 1 189 0
512 0142 0243 orrsr2, r2, r0
187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN;
513 .loc 1 187 0
514 0144 43F08003 orrr3, r3, #128
515 .loc 1 189 0
516 0148 D2B2 uxtbr2, r2
187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN;
517 .loc 1 187 0
518 014a E360 strr3, [r4, #12]
519 .loc 1 189 0
520 014c 6260 strr2, [r4, #4]
190:main.c ****
191:main.c **** LPC_UART4->DLL = UART_LOAD_DLL(best_divisor);
521 .loc 1 191 0
522 014e 2160 strr1, [r4]
192:main.c ****
193:main.c **** /* Then reset DLAB bit */
194:main.c **** LPC_UART4->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
523 .loc 1 194 0
524 0150 E368 ldrr3, [r4, #12]
ARM GAS /tmp/ccSGB01A.s page 14
525 0152 03F07F03 andr3, r3, #127
526 0156 E360 strr3, [r4, #12]
527 .L56:
195:main.c ****
196:main.c **** LPC_UART4->FDR = (UART_FDR_MULVAL(bestm)
528 .loc 1 196 0
529 0158 EDB2 uxtbr5, r5
197:main.c **** | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
530 .loc 1 197 0
531 015a 45EA0905 orrr5, r5, r9
196:main.c **** LPC_UART4->FDR = (UART_FDR_MULVAL(bestm)
532 .loc 1 196 0
533 015e A562 strr5, [r4, #40]
534 0160 18E0 b.L55
535 .LVL55:
536 .L45:
537 0162 032F cmpr7, #3
538 0164 96BF itetls
539 0166 104B ldrlsr3, .L57+8
185:main.c **** else if (UartID == UART_4)
540 .loc 1 185 0
541 0168 0024 movhir4, #0
542 .LVL56:
543 016a 53F82740 ldrlsr4, [r3, r7, lsl #2]
544 .LVL57:
545 .LBB13:
198:main.c **** }
199:main.c ****
200:main.c **** else
201:main.c **** {
202:main.c **** LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID);
203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN;
204:main.c ****
205:main.c **** UARTx->DLM = UART_LOAD_DLM(best_divisor);
546 .loc 1 205 0
547 016e 4FEA1A22 lsrr2, r10, #8
203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN;
548 .loc 1 203 0
549 0172 237B ldrbr3, [r4, #12]@ zero_extendqisi2
550 .loc 1 205 0
551 0174 0243 orrsr2, r2, r0
203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN;
552 .loc 1 203 0
553 0176 43F08003 orrr3, r3, #128
554 .loc 1 205 0
555 017a D2B2 uxtbr2, r2
203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN;
556 .loc 1 203 0
557 017c 2373 strbr3, [r4, #12]
558 .loc 1 205 0
559 017e 2271 strbr2, [r4, #4]
206:main.c ****
207:main.c **** UARTx->DLL = UART_LOAD_DLL(best_divisor);
560 .loc 1 207 0
561 0180 2170 strbr1, [r4]
208:main.c ****
209:main.c **** /* Then reset DLAB bit */
ARM GAS /tmp/ccSGB01A.s page 15
210:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
562 .loc 1 210 0
563 0182 237B ldrbr3, [r4, #12]@ zero_extendqisi2
211:main.c ****
212:main.c **** UARTx->FDR = (UART_FDR_MULVAL(bestm) \
564 .loc 1 212 0
565 0184 49EA0505 orrr5, r9, r5
210:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
566 .loc 1 210 0
567 0188 03F07F03 andr3, r3, #127
568 .loc 1 212 0
569 018c EDB2 uxtbr5, r5
210:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
570 .loc 1 210 0
571 018e 2373 strbr3, [r4, #12]
572 .loc 1 212 0
573 0190 84F82850 strbr5, [r4, #40]
574 .LVL58:
575 .L55:
576 .LBE13:
213:main.c **** | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
214:main.c **** }
215:main.c **** errorStatus = SUCCESS;
577 .loc 1 215 0
578 0194 0120 movsr0, #1
579 0196 00E0 b.L41
580 .LVL59:
581 .L51:
156:main.c **** return ERROR;
582 .loc 1 156 0
583 0198 0020 movsr0, #0
584 .LVL60:
585 .L41:
216:main.c **** }
217:main.c ****
218:main.c **** return errorStatus;
219:main.c **** }
586 .loc 1 219 0
587 019a 0DB0 addsp, sp, #52
588 @ sp needed
589 019c BDE8F08F pop{r4, r5, r6, r7, r8, r9, r10, fp, pc}
590 .LVL61:
591 .L58:
592 .align2
593 .L57:
594 01a0 00000140 .word1073807360
595 01a4 00400A40 .word1074413568
596 01a8 00000000 .word.LANCHOR0
597 .cfi_endproc
598 .LFE57:
600 .section.text.startup.main,"ax",%progbits
601 .align1
602 .globalmain
603 .thumb
604 .thumb_func
606 main:
607 .LFB58:
ARM GAS /tmp/ccSGB01A.s page 16
220:main.c ****
221:main.c ****
222:main.c ****
223:main.c ****
224:main.c **** int main()
225:main.c **** {
608 .loc 1 225 0
609 .cfi_startproc
610 @ args = 0, pretend = 0, frame = 8
611 @ frame_needed = 0, uses_anonymous_args = 0
612 0000 37B5 push{r0, r1, r2, r4, r5, lr}
613 .LCFI4:
614 .cfi_def_cfa_offset 24
615 .cfi_offset 0, -24
616 .cfi_offset 1, -20
617 .cfi_offset 2, -16
618 .cfi_offset 4, -12
619 .cfi_offset 5, -8
620 .cfi_offset 14, -4
226:main.c ****
227:main.c **** //Remove all interrupts
228:main.c **** NVIC_DeInit();
621 .loc 1 228 0
622 0002 FFF7FEFF blNVIC_DeInit
623 .LVL62:
229:main.c ****
230:main.c **** GPIO_Init();
231:main.c **** GPIO_SetDir(4, 1<<28|1<<29, GPIO_DIRECTION_OUTPUT);
232:main.c **** LPC_GPIO4->SET = 1<<28|1<<29;
624 .loc 1 232 0
625 0006 324C ldrr4, .L66
230:main.c **** GPIO_Init();
626 .loc 1 230 0
627 0008 FFF7FEFF blGPIO_Init
628 .LVL63:
231:main.c **** GPIO_SetDir(4, 1<<28|1<<29, GPIO_DIRECTION_OUTPUT);
629 .loc 1 231 0
630 000c 0122 movsr2, #1
631 000e 0420 movsr0, #4
632 0010 4FF04051 movr1, #805306368
633 0014 FFF7FEFF blGPIO_SetDir
634 .LVL64:
635 .loc 1 232 0
636 0018 4FF04053 movr3, #805306368
637 001c A361 strr3, [r4, #24]
233:main.c ****
234:main.c ****
235:main.c **** //Start manual init of UART0
236:main.c **** uint32_t tmp;
237:main.c **** CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
638 .loc 1 237 0
639 001e 0820 movsr0, #8
640 0020 0121 movsr1, #1
641 0022 FFF7FEFF blCLKPWR_ConfigPPWR
642 .LVL65:
238:main.c **** LPC_UART_TypeDef* UARTx = LPC_UART0;
239:main.c **** UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
ARM GAS /tmp/ccSGB01A.s page 17
643 .loc 1 239 0
644 0026 2B4B ldrr3, .L66+4
645 0028 0722 movsr2, #7
646 002a 1A72 strbr2, [r3, #8]
240:main.c **** UARTx->FCR = 0;
647 .loc 1 240 0
648 002c 0022 movsr2, #0
649 002e 1A72 strbr2, [r3, #8]
650 0030 2546 movr5, r4
651 .L60:
241:main.c **** while (UARTx->LSR & UART_LSR_RDR)
652 .loc 1 241 0 discriminator 1
653 0032 284B ldrr3, .L66+4
654 0034 1A7D ldrbr2, [r3, #20]@ zero_extendqisi2
655 0036 12F0010F tstr2, #1
656 003a 1A46 movr2, r3
657 003c 01D0 beq.L65
242:main.c **** {
243:main.c **** tmp = UARTx->RBR;
658 .loc 1 243 0
659 003e 1B78 ldrbr3, [r3]@ zero_extendqisi2
660 .LVL66:
661 0040 F7E7 b.L60
662 .L65:
244:main.c **** }
245:main.c ****
246:main.c **** UARTx->TER = UART_TER_TXEN;
663 .loc 1 246 0
664 0042 8023 movsr3, #128
665 0044 82F83030 strbr3, [r2, #48]
666 .L63:
247:main.c **** // Wait for current transmit complete
248:main.c **** while (!(UARTx->LSR & UART_LSR_THRE));
667 .loc 1 248 0 discriminator 1
668 0048 117D ldrbr1, [r2, #20]@ zero_extendqisi2
669 004a 224B ldrr3, .L66+4
670 004c 8906 lslsr1, r1, #26
671 004e FBD5 bpl.L63
249:main.c ****
250:main.c **** // Disable Tx
251:main.c **** UARTx->TER = 0;
672 .loc 1 251 0
673 0050 0024 movsr4, #0
674 0052 83F83040 strbr4, [r3, #48]
252:main.c ****
253:main.c **** // Disable interrupt
254:main.c **** UARTx->IER = 0;
675 .loc 1 254 0
676 0056 5C60 strr4, [r3, #4]
255:main.c ****
256:main.c **** // Set LCR to default state
257:main.c **** UARTx->LCR = 0;
677 .loc 1 257 0
678 0058 1C73 strbr4, [r3, #12]
258:main.c ****
259:main.c **** // Set ACR to default state
260:main.c **** UARTx->ACR = 0;
ARM GAS /tmp/ccSGB01A.s page 18
679 .loc 1 260 0
680 005a 1C62 strr4, [r3, #32]
261:main.c ****
262:main.c **** // Set RS485 control to default state
263:main.c **** UARTx->RS485CTRL = 0;
681 .loc 1 263 0
682 005c 83F84C40 strbr4, [r3, #76]
264:main.c ****
265:main.c **** // Set RS485 delay timer to default state
266:main.c **** UARTx->RS485DLY = 0;
683 .loc 1 266 0
684 0060 83F85440 strbr4, [r3, #84]
267:main.c ****
268:main.c **** // Set RS485 addr match to default state
269:main.c **** UARTx->ADRMATCH = 0;
685 .loc 1 269 0
686 0064 83F85040 strbr4, [r3, #80]
270:main.c ****
271:main.c **** // Dummy reading
272:main.c **** tmp = UARTx->LSR;
687 .loc 1 272 0
688 0068 1A7D ldrbr2, [r3, #20]@ zero_extendqisi2
273:main.c ****
274:main.c **** //Set divisors here- hard-coded values for 115200
275:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN;
689 .loc 1 275 0
690 006a 1A7B ldrbr2, [r3, #12]@ zero_extendqisi2
276:main.c **** UARTx->DLM = 0;
277:main.c **** UARTx->DLL = 0xd9;
278:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
279:main.c **** UARTx->FDR = 0x54;
280:main.c ****
281:main.c **** tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
282:main.c **** tmp |= UART_LCR_WLEN8; //8 data bits
283:main.c **** //(no parity)
284:main.c **** //(1 stop bit)
285:main.c **** UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
286:main.c **** //End manual init of UART 0
287:main.c ****
288:main.c **** //setting these to '2' gives UART3 control of p0[2,3]
289:main.c **** PINSEL_ConfigPin(0, 2, 1);
691 .loc 1 289 0
692 006c 0221 movsr1, #2
275:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN;
693 .loc 1 275 0
694 006e 42F08002 orrr2, r2, #128
695 0072 1A73 strbr2, [r3, #12]
277:main.c **** UARTx->DLL = 0xd9;
696 .loc 1 277 0
697 0074 D922 movsr2, #217
276:main.c **** UARTx->DLM = 0;
698 .loc 1 276 0
699 0076 1C71 strbr4, [r3, #4]
277:main.c **** UARTx->DLL = 0xd9;
700 .loc 1 277 0
701 0078 1A70 strbr2, [r3]
278:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
ARM GAS /tmp/ccSGB01A.s page 19
702 .loc 1 278 0
703 007a 1A7B ldrbr2, [r3, #12]@ zero_extendqisi2
704 .loc 1 289 0
705 007c 2046 movr0, r4
278:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
706 .loc 1 278 0
707 007e 02F07F02 andr2, r2, #127
708 0082 1A73 strbr2, [r3, #12]
279:main.c **** UARTx->FDR = 0x54;
709 .loc 1 279 0
710 0084 5422 movsr2, #84
711 0086 83F82820 strbr2, [r3, #40]
281:main.c **** tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
712 .loc 1 281 0
713 008a 1A7B ldrbr2, [r3, #12]@ zero_extendqisi2
714 .LVL67:
715 008c 02F0C002 andr2, r2, #192
716 .LVL68:
282:main.c **** tmp |= UART_LCR_WLEN8; //8 data bits
717 .loc 1 282 0
718 0090 42F00302 orrr2, r2, #3
719 .LVL69:
285:main.c **** UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
720 .loc 1 285 0
721 0094 1A73 strbr2, [r3, #12]
722 .loc 1 289 0
723 0096 0122 movsr2, #1
724 .LVL70:
725 0098 FFF7FEFF blPINSEL_ConfigPin
726 .LVL71:
290:main.c **** PINSEL_ConfigPin(0, 3, 1);
727 .loc 1 290 0
728 009c 0122 movsr2, #1
729 009e 0321 movsr1, #3
730 00a0 2046 movr0, r4
731 00a2 FFF7FEFF blPINSEL_ConfigPin
732 .LVL72:
291:main.c ****
292:main.c **** UART_FIFO_CFG_Type UARTFIFOConfigStruct;
293:main.c **** UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
733 .loc 1 293 0
734 00a6 01A8 addr0, sp, #4
735 00a8 FFF7FEFF blUART_FIFOConfigStructInit
736 .LVL73:
294:main.c **** UART_FIFOConfig(UART_0, &UARTFIFOConfigStruct);
737 .loc 1 294 0
738 00ac 2046 movr0, r4
739 00ae 01A9 addr1, sp, #4
740 00b0 FFF7FEFF blUART_FIFOConfig
741 .LVL74:
295:main.c **** UART_TxCmd(UART_0, ENABLE);
742 .loc 1 295 0
743 00b4 2046 movr0, r4
744 00b6 0121 movsr1, #1
745 00b8 FFF7FEFF blUART_TxCmd
746 .LVL75:
296:main.c ****
ARM GAS /tmp/ccSGB01A.s page 20
297:main.c ****
298:main.c ****
299:main.c **** uart_set_divisors(UART_3, 115200);
747 .loc 1 299 0
748 00bc 0320 movsr0, #3
749 00be 4FF4E131 movr1, #115200
750 00c2 FFF7FEFF bluart_set_divisors
751 .LVL76:
300:main.c ****
301:main.c **** //FIXME: Remove
302:main.c **** LPC_GPIO4->CLR = 1<<29;
752 .loc 1 302 0
753 00c6 4FF00053 movr3, #536870912
754 00ca EB61 strr3, [r5, #28]
755 .L64:
756 00cc FEE7 b.L64
757 .L67:
758 00ce 00BF .align2
759 .L66:
760 00d0 80800920 .word537493632
761 00d4 00C00040 .word1073790976
762 .cfi_endproc
763 .LFE58:
765 .section.rodata.CSWTCH.6,"a",%progbits
766 .align2
767 .set.LANCHOR0,. + 0
770 CSWTCH.6:
771 0000 00C00040 .word1073790976
772 0004 00000000 .word0
773 0008 00800940 .word1074364416
774 000c 00C00940 .word1074380800
775 .section.rodata.str1.1,"aMS",%progbits,1
776 .LC0:
777 0000 62757320 .ascii"bus fault: \000"
777 6661756C
777 743A2000
778 .LC1:
779 000c 42464152 .ascii"BFAR: \000"
779 3A2000
780 .LC2:
781 0013 6D656D20 .ascii"mem fault\012\015\000"
781 6661756C
781 740A0D00
782 .LC3:
783 001f 75736720 .ascii"usg fault\012\015\000"
783 6661756C
783 740A0D00
784 .text
785 .Letext0:
786 .file 2 "/home/ghost/embedded/arm/gcc-arm-none-eabi-4_8-2014q3/lib/gcc/arm-none-eabi/4.8.4/include
787 .file 3 "./core_cm3.h"
788 .file 4 "./LPC177x_8x.h"
789 .file 5 "./Drivers/include/lpc_types.h"
790 .file 6 "./Drivers/include/lpc177x_8x_uart.h"
791 .file 7 "./Drivers/include/lpc177x_8x_clkpwr.h"
792 .file 8 "./Drivers/include/lpc177x_8x_gpio.h"
ARM GAS /tmp/ccSGB01A.s page 21
DEFINED SYMBOLS
*ABS*:00000000 main.c
/tmp/ccSGB01A.s:19 .text.HardFault_Handler:00000000 $t
/tmp/ccSGB01A.s:24 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccSGB01A.s:229 .text.HardFault_Handler:00000108 $d
/tmp/ccSGB01A.s:239 .text.uart_get_pointer:00000000 $t
/tmp/ccSGB01A.s:244 .text.uart_get_pointer:00000000 uart_get_pointer
/tmp/ccSGB01A.s:266 .text.uart_get_pointer:00000010 $d
/tmp/ccSGB01A.s:272 .text.uart_set_divisors:00000000 $t
/tmp/ccSGB01A.s:277 .text.uart_set_divisors:00000000 uart_set_divisors
/tmp/ccSGB01A.s:594 .text.uart_set_divisors:000001a0 $d
/tmp/ccSGB01A.s:601 .text.startup.main:00000000 $t
/tmp/ccSGB01A.s:606 .text.startup.main:00000000 main
/tmp/ccSGB01A.s:760 .text.startup.main:000000d0 $d
/tmp/ccSGB01A.s:766 .rodata.CSWTCH.6:00000000 $d
/tmp/ccSGB01A.s:770 .rodata.CSWTCH.6:00000000 CSWTCH.6
.debug_frame:00000010 $d
UNDEFINED SYMBOLS
UART_Send
__aeabi_uldivmod
CLKPWR_GetCLK
NVIC_DeInit
GPIO_Init
GPIO_SetDir
CLKPWR_ConfigPPWR
PINSEL_ConfigPin
UART_FIFOConfigStructInit
UART_FIFOConfig
UART_TxCmd |