//Code executes to here /* can not find best match */ if(best_divisor == 0) { //...but not here return ERROR; } //...or here |
int main() { TIM_TIMERCFG_Type tinit; tinit.PrescaleOption = TIM_PRESCALE_TICKVAL; tinit.PrescaleValue = 12; //12 seems to be the correct value for 24 MHz TIM_Init(LPC_TIM0, TIM_TIMER_MODE, &tinit); Delay(500); GPIO_Init(); GPIO_SetDir(4, 1<<5, GPIO_DIRECTION_OUTPUT); //LCD reset line //Try to set up UART UART_CFG_Type cfg; UART_FIFO_CFG_Type UARTFIFOConfigStruct; //setting these to '2' gives UART3 control of p0[2,3] PINSEL_ConfigPin(0, 2, 2); PINSEL_ConfigPin(0, 3, 2); UART_ConfigStructInit(&cfg); UART_Init(UART_3, &cfg); //this never returns UART_FIFOConfigStructInit(&UARTFIFOConfigStruct); UART_FIFOConfig(UART_3, &UARTFIFOConfigStruct); UART_TxCmd(UART_3, ENABLE); //should get here and loop forever while(1) { LPC_GPIO4->SET = 1<<5; char buf[] = "foobar\n"; LPC_GPIO4->CLR = 1<<5; UART_SendByte(UART_3, 0x55); } return 0; } |
#define CLOCK_SETUP 1 //#define SCS_Val 0x00000021 //0000 Changed to disable use of main oscillator- we don't have one! #define SCS_Val 0x00000001 //0000 Again, changed to use the internal RC oscillator //#define CLKSRCSEL_Val 0x00000001 #define CLKSRCSEL_Val 0x00000000 #define PLL0_SETUP 1 #define PLL0CFG_Val 0x00000009 //#define PLL0CFG_Val 0x00000002 //0000 Don't use PLL1 with internal RC oscillator //#define PLL1_SETUP 1 #define PLL1_SETUP 0 #define PLL1CFG_Val 0x00000023 //0000 Try using sysclk directly, without the PLL //#define CCLKSEL_Val 0x00000101 #define CCLKSEL_Val 0x00000001 #define USBCLKSEL_Val 0x00000201 #define EMCCLKSEL_Val 0x00000001 #define PCLKSEL_Val 0x00000002 #define PCONP_Val 0x042887DE #define CLKOUTCFG_Val 0x00000100 |
Original Attachment has been moved to: uart_test_code.tar.gz
divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d)); |
str r1, [r0, r0] |
/********************************************************************** * $Id$ lpc177x_8x_uart.c 2011-06-02 *//** * @file lpc177x_8x_uart.c * @brief Contains all functions support for UART firmware library * on LPC177x_8x * @version 1.0 * @date 02. June. 2011 * @author NXP MCU SW Application Team * * Copyright(C) 2011, NXP Semiconductor * All rights reserved. * *********************************************************************** * Software that is described herein is for illustrative purposes only * which provides customers with programming information regarding the * products. This software is supplied "AS IS" without any warranties. * NXP Semiconductors assumes no responsibility or liability for the * use of the software, conveys no license or title under any patent, * copyright, or mask work right to the product. NXP Semiconductors * reserves the right to make changes in the software without * notification. NXP Semiconductors also make no representation or * warranty that such application will be suitable for the specified * use without further testing or modification. * Permission to use, copy, modify, and distribute this software and its * documentation is hereby granted, under NXP Semiconductors' * relevant copyright in the software, without fee, provided that it * is used in conjunction with NXP Semiconductors microcontrollers. This * copyright, permission, and disclaimer notice must appear in all copies of * this code. **********************************************************************/ /* Peripheral group ----------------------------------------------------------- */ /** @addtogroup UART * @{ */ #ifdef __BUILD_WITH_EXAMPLE__ #include "lpc177x_8x_libcfg.h" #else #include "lpc177x_8x_libcfg_default.h" #endif /* __BUILD_WITH_EXAMPLE__ */ #ifdef _UART /* Includes ------------------------------------------------------------------- */ #include "lpc177x_8x_uart.h" #include "lpc177x_8x_clkpwr.h" /* Private Functions ---------------------------------------------------------- */ static Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate); static LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID); /*********************************************************************//** * @brief Determines best dividers to get a target clock rate * @param[in] UARTx Pointer to selected UART peripheral, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] baudrate Desired UART baud rate. * @return Error status, could be: * - SUCCESS * - ERROR **********************************************************************/ static Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate) { Status errorStatus = ERROR; uint32_t uClk; uint32_t d, m, bestd, bestm, tmp; uint64_t best_divisor, divisor; uint32_t current_error, best_error; uint32_t recalcbaud; /* get UART block clock */ uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER); /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers * The formula is : * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL) * It involves floating point calculations. That's the reason the formulae are adjusted with * Multiply and divide method.*/ /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions: * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */ best_error = 0xFFFFFFFF; /* Worst case */ bestd = 0; bestm = 0; best_divisor = 0; for (m = 1 ; m <= 15 ;m++) { for (d = 0 ; d < m ; d++) { divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d)); current_error = divisor & 0xFFFFFFFF; tmp = divisor>>32; /* Adjust error */ if(current_error > ((uint32_t)1<<31)) { current_error = -current_error; tmp++; } /* Out of range */ if(tmp < 1 || tmp > 65536) continue; if( current_error < best_error) { best_error = current_error; best_divisor = tmp; bestd = d; bestm = m; if(best_error == 0) break; } } /* end of inner for loop */ if (best_error == 0) break; } /* end of outer for loop */ /* can not find best match */ if(best_divisor == 0) return ERROR; recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd)); /* reuse best_error to evaluate baud error*/ if(baudrate > recalcbaud) best_error = baudrate - recalcbaud; else best_error = recalcbaud -baudrate; best_error = best_error * 100 / baudrate; if (best_error < UART_ACCEPTED_BAUDRATE_ERROR) { if (UartID == UART_1) { LPC_UART1->LCR |= UART_LCR_DLAB_EN; LPC_UART1->DLM = UART_LOAD_DLM(best_divisor); LPC_UART1->DLL = UART_LOAD_DLL(best_divisor); /* Then reset DLAB bit */ LPC_UART1->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; LPC_UART1->FDR = (UART_FDR_MULVAL(bestm) | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; } else if (UartID == UART_4) { LPC_UART4->LCR |= UART_LCR_DLAB_EN; LPC_UART4->DLM = UART_LOAD_DLM(best_divisor); LPC_UART4->DLL = UART_LOAD_DLL(best_divisor); /* Then reset DLAB bit */ LPC_UART4->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; LPC_UART4->FDR = (UART_FDR_MULVAL(bestm) | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); UARTx->LCR |= UART_LCR_DLAB_EN; UARTx->DLM = UART_LOAD_DLM(best_divisor); UARTx->DLL = UART_LOAD_DLL(best_divisor); /* Then reset DLAB bit */ UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; UARTx->FDR = (UART_FDR_MULVAL(bestm) \ | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; } errorStatus = SUCCESS; } return errorStatus; } /*********************************************************************//** * @brief Get the pointer of a given Uart * @param[in] UARTx Pointer to selected UART peripheral, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return LPC_UART0~LPC_UART4 **********************************************************************/ LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID) { LPC_UART_TypeDef *UARTx = NULL; switch(UartID) { case UART_0: UARTx = LPC_UART0; break; case UART_2: UARTx = LPC_UART2; break; case UART_3: UARTx = LPC_UART3; break; default: break; } return UARTx; } /* End of Private Functions ---------------------------------------------------- */ /* Public Functions ----------------------------------------------------------- */ /** @addtogroup UART_Public_Functions * @{ */ /* UART Init/DeInit functions -------------------------------------------------*/ /********************************************************************//** * @brief Initializes the UARTx peripheral according to the specified * parameters in the UART_ConfigStruct. * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure * that contains the configuration information for the * specified UART peripheral. * @return None *********************************************************************/ void UART_Init(UART_ID_Type UartID, UART_CFG_Type *UART_ConfigStruct) { uint32_t tmp; switch (UartID) { case UART_0: case UART_2: case UART_3: { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); if(UartID == UART_0) /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE); else if(UartID == UART_2) /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE); else if(UartID == UART_3) /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);; /* FIFOs are empty */ UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS); // Disable FIFO UARTx->FCR = 0; // Dummy reading while (UARTx->LSR & UART_LSR_RDR) { tmp = UARTx->RBR; } UARTx->TER = UART_TER_TXEN; // Wait for current transmit complete while (!(UARTx->LSR & UART_LSR_THRE)); // Disable Tx UARTx->TER = 0; // Disable interrupt UARTx->IER = 0; // Set LCR to default state UARTx->LCR = 0; // Set ACR to default state UARTx->ACR = 0; // Set RS485 control to default state UARTx->RS485CTRL = 0; // Set RS485 delay timer to default state UARTx->RS485DLY = 0; // Set RS485 addr match to default state UARTx->ADRMATCH = 0; // Dummy reading tmp = UARTx->LSR; } break; case UART_1: { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE); /* FIFOs are empty */ LPC_UART1->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS); // Disable FIFO LPC_UART1->FCR = 0; // Dummy reading while (LPC_UART1->LSR & UART_LSR_RDR) { tmp = LPC_UART1->RBR; } LPC_UART1->TER = UART_TER_TXEN; // Wait for current transmit complete while (!(LPC_UART1->LSR & UART_LSR_THRE)); // Disable Tx LPC_UART1->TER = 0; // Disable interrupt LPC_UART1->IER = 0; // Set LCR to default state LPC_UART1->LCR = 0; // Set ACR to default state LPC_UART1->ACR = 0; // Set RS485 control to default state LPC_UART1->RS485CTRL = 0; // Set RS485 delay timer to default state LPC_UART1->RS485DLY = 0; // Set RS485 addr match to default state LPC_UART1->ADRMATCH = 0; // Dummy reading tmp = LPC_UART1->LSR; // Set Modem Control to default state LPC_UART1->MCR = 0; //Dummy Reading to Clear Status tmp = LPC_UART1->MSR; } break; case UART_4: { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART4, ENABLE); /* FIFOs are empty */ LPC_UART4->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS); // Disable FIFO LPC_UART4->FCR = 0; // Dummy reading while (LPC_UART4->LSR & UART_LSR_RDR) { tmp = LPC_UART4->RBR; } //LPC_UART4->TER = UART4_TER_TXEN; // Wait for current transmit complete while (!(LPC_UART4->LSR & UART_LSR_THRE)); // Disable Tx // LPC_UART4->TER = 0; // Disable interrupt LPC_UART4->IER = 0; // Set LCR to default state LPC_UART4->LCR = 0; // Set ACR to default state LPC_UART4->ACR = 0; // Set RS485 control to default state LPC_UART4->RS485CTRL = 0; // Set RS485 delay timer to default state LPC_UART4->RS485DLY = 0; // Set RS485 addr match to default state LPC_UART4->ADRMATCH = 0; // Dummy reading tmp = LPC_UART4->LSR; // Set IrDA Mode to default state LPC_UART4->ICR = 0; } break; } // Set Line Control register ---------------------------- uart_set_divisors(UartID, (UART_ConfigStruct->Baud_rate)); if (UartID == UART_1) { tmp = (LPC_UART1->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \ & UART_LCR_BITMASK; } else if (UartID == UART_4) { tmp = (LPC_UART4->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \ & UART_LCR_BITMASK; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK; } switch (UART_ConfigStruct->Databits) { case UART_DATABIT_5: tmp |= UART_LCR_WLEN5; break; case UART_DATABIT_6: tmp |= UART_LCR_WLEN6; break; case UART_DATABIT_7: tmp |= UART_LCR_WLEN7; break; case UART_DATABIT_8: default: tmp |= UART_LCR_WLEN8; break; } if (UART_ConfigStruct->Parity == UART_PARITY_NONE) { // Do nothing... } else { tmp |= UART_LCR_PARITY_EN; switch (UART_ConfigStruct->Parity) { case UART_PARITY_ODD: tmp |= UART_LCR_PARITY_ODD; break; case UART_PARITY_EVEN: tmp |= UART_LCR_PARITY_EVEN; break; case UART_PARITY_SP_1: tmp |= UART_LCR_PARITY_F_1; break; case UART_PARITY_SP_0: tmp |= UART_LCR_PARITY_F_0; break; default: break; } } switch (UART_ConfigStruct->Stopbits) { case UART_STOPBIT_2: tmp |= UART_LCR_STOPBIT_SEL; break; case UART_STOPBIT_1: default: // Do no thing break; } // Write back to LCR, configure FIFO and Disable Tx if (UartID == UART_1) { LPC_UART1->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); } else if (UartID == UART_4) { LPC_UART4->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); } } /*********************************************************************//** * @brief De-initializes the UARTx peripheral registers to their * default reset values. * @param[in] UartID UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return None **********************************************************************/ void UART_DeInit(UART_ID_Type UartID) { UART_TxCmd(UartID, DISABLE); if (UartID == UART_0) { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE); } else if (UartID == UART_1) { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE); } else if (UartID == UART_2) { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE); } else if (UartID == UART_3) { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE); } else if (UartID == UART_4) { /* Set up clock and power for UART module */ CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART4, DISABLE); } } /*****************************************************************************//** * @brief Fills each UART_InitStruct member with its default value: * - 115200 bps * - 8-bit data * - 1 Stopbit * - None Parity * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure * which will be initialized. * @return None *******************************************************************************/ void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct) { UART_InitStruct->Baud_rate = 115200; UART_InitStruct->Databits = UART_DATABIT_8; UART_InitStruct->Parity = UART_PARITY_NONE; UART_InitStruct->Stopbits = UART_STOPBIT_1; } /* UART Send/Recieve functions -------------------------------------------------*/ /*********************************************************************//** * @brief Transmit a single data through UART peripheral * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] Data Data to transmit (must be 8-bit long) * @return None **********************************************************************/ void UART_SendByte(UART_ID_Type UartID, uint8_t Data) { switch (UartID) { case UART_0: LPC_UART0->THR = Data & UART_THR_MASKBIT; break; case UART_1: LPC_UART1->THR = Data & UART_THR_MASKBIT; break; case UART_2: LPC_UART2->THR = Data & UART_THR_MASKBIT; break; case UART_3: LPC_UART3->THR = Data & UART_THR_MASKBIT; break; case UART_4: LPC_UART4->THR = Data & UART_THR_MASKBIT; break; } } /*********************************************************************//** * @brief Receive a single data from UART peripheral * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return Data received **********************************************************************/ uint8_t UART_ReceiveByte(UART_ID_Type UartID) { switch (UartID) { case UART_0: return (LPC_UART0->RBR & UART_RBR_MASKBIT); case UART_1: return (LPC_UART1->RBR & UART_RBR_MASKBIT); case UART_2: return (LPC_UART2->RBR & UART_RBR_MASKBIT); case UART_3: return (LPC_UART3->RBR & UART_RBR_MASKBIT); case UART_4: return (LPC_UART4->RBR & UART_RBR_MASKBIT); } return 0x00; } /*********************************************************************//** * @brief Send a block of data via UART peripheral * @param[in] UARTx Selected UART peripheral used to send data, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] txbuf Pointer to Transmit buffer * @param[in] buflen Length of Transmit buffer * @param[in] flag Flag used in UART transfer, should be * NONE_BLOCKING or BLOCKING * @return Number of bytes sent. * * Note: when using UART in BLOCKING mode, a time-out condition is used * via defined symbol UART_BLOCKING_TIMEOUT. **********************************************************************/ uint32_t UART_Send(UART_ID_Type UartID, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag) { uint32_t bToSend, bSent, timeOut, fifo_cnt; uint8_t *pChar = txbuf; __IO uint32_t *LSR = NULL; switch (UartID) { case UART_0: LSR = (__IO uint32_t *)&LPC_UART0->LSR; break; case UART_1: LSR = (__IO uint32_t *)&LPC_UART1->LSR; break; case UART_2: LSR = (__IO uint32_t *)&LPC_UART2->LSR; break; case UART_3: LSR = (__IO uint32_t *)&LPC_UART3->LSR; break; case UART_4: LSR = (__IO uint32_t *)&LPC_UART4->LSR; break; } bToSend = buflen; // blocking mode if (flag == BLOCKING) { bSent = 0; while (bToSend) { timeOut = UART_BLOCKING_TIMEOUT; // Wait for THR empty with timeout while (!(*LSR & UART_LSR_THRE)) { if (timeOut == 0) break; timeOut--; } // Time out! if(timeOut == 0) break; fifo_cnt = UART_TX_FIFO_SIZE; while (fifo_cnt && bToSend) { UART_SendByte(UartID, (*pChar++)); fifo_cnt--; bToSend--; bSent++; } } } // None blocking mode else { bSent = 0; while (bToSend) { if (bToSend == 0) break; if (!(*LSR & UART_LSR_THRE)) { break; } fifo_cnt = UART_TX_FIFO_SIZE; while (fifo_cnt && bToSend) { UART_SendByte(UartID, (*pChar++)); bToSend--; fifo_cnt--; bSent++; } } } return bSent; } /*********************************************************************//** * @brief Receive a block of data via UART peripheral * @param[in] UARTx Selected UART peripheral used to send data, * should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[out] rxbuf Pointer to Received buffer * @param[in] buflen Length of Received buffer * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING * @return Number of bytes received * * Note: when using UART in BLOCKING mode, a time-out condition is used * via defined symbol UART_BLOCKING_TIMEOUT. **********************************************************************/ uint32_t UART_Receive(UART_ID_Type UartID, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag) { uint32_t bToRecv, bRecv, timeOut; uint8_t *pChar = rxbuf; __IO uint32_t *LSR = NULL; switch (UartID) { case UART_0: LSR = (__IO uint32_t *)&LPC_UART0->LSR; break; case UART_1: LSR = (__IO uint32_t *)&LPC_UART1->LSR; break; case UART_2: LSR = (__IO uint32_t *)&LPC_UART2->LSR; break; case UART_3: LSR = (__IO uint32_t *)&LPC_UART3->LSR; break; case UART_4: LSR = (__IO uint32_t *)&LPC_UART4->LSR; break; } bToRecv = buflen; // Blocking mode if (flag == BLOCKING) { bRecv = 0; while (bToRecv) { timeOut = UART_BLOCKING_TIMEOUT; while (!(*LSR & UART_LSR_RDR)) { if (timeOut == 0) break; timeOut--; } // Time out! if(timeOut == 0) break; // Get data from the buffer (*pChar++) = UART_ReceiveByte(UartID); bToRecv--; bRecv++; } } // None blocking mode else { bRecv = 0; while (bToRecv) { if (!(*LSR & UART_LSR_RDR)) { break; } else { (*pChar++) = UART_ReceiveByte(UartID); bRecv++; bToRecv--; } } } return bRecv; } /*********************************************************************//** * @brief Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0. * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return None **********************************************************************/ void UART_ForceBreak(UART_ID_Type UartID) { switch (UartID) { case UART_0: LPC_UART0->LCR |= UART_LCR_BREAK_EN; break; case UART_1: LPC_UART1->LCR |= UART_LCR_BREAK_EN; break; case UART_2: LPC_UART2->LCR |= UART_LCR_BREAK_EN; break; case UART_3: LPC_UART3->LCR |= UART_LCR_BREAK_EN; break; case UART_4: LPC_UART4->LCR |= UART_LCR_BREAK_EN; break; } } /********************************************************************//** * @brief Enable or disable specified UART interrupt. * @param[in] UARTx UART peripheral selected, should be * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] UARTIntCfg Specifies the interrupt flag, * should be one of the following: - UART_INTCFG_RBR : RBR Interrupt enable - UART_INTCFG_THRE : THR Interrupt enable - UART_INTCFG_RLS : RX line status interrupt enable - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only) - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only) - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt * @param[in] NewState New state of specified UART interrupt type, * should be: * - ENALBE: Enable this UART interrupt type. * - DISALBE: Disable this UART interrupt type. * @return None *********************************************************************/ void UART_IntConfig(UART_ID_Type UartID, UART_INT_Type UARTIntCfg, FunctionalState NewState) { uint32_t tmp; __IO uint32_t *IER = NULL; uint32_t IERMask = 0; switch (UartID) { case UART_0: IER = &LPC_UART0->IER; IERMask = UART_IER_BITMASK; break; case UART_1: IER = &LPC_UART1->IER; IERMask = UART1_IER_BITMASK; break; case UART_2: IER = &LPC_UART2->IER; IERMask = UART_IER_BITMASK; break; case UART_3: IER = &LPC_UART3->IER; IERMask = UART_IER_BITMASK; break; case UART_4: IER = &LPC_UART4->IER; IERMask = UART_IER_BITMASK; break; } switch(UARTIntCfg) { case UART_INTCFG_RBR: tmp = UART_IER_RBRINT_EN; break; case UART_INTCFG_THRE: tmp = UART_IER_THREINT_EN; break; case UART_INTCFG_RLS: tmp = UART_IER_RLSINT_EN; break; case UART_INTCFG_MS: tmp = UART1_IER_MSINT_EN; break; case UART_INTCFG_CTS: tmp = UART1_IER_CTSINT_EN; break; case UART_INTCFG_ABEO: tmp = UART_IER_ABEOINT_EN; break; case UART_INTCFG_ABTO: tmp = UART_IER_ABTOINT_EN; break; } if (NewState == ENABLE) { *IER |= tmp& IERMask; } else { *IER &= (~tmp) & IERMask; } } /********************************************************************//** * @brief Get current value of Line Status register in UART peripheral. * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return Current value of Line Status register in UART peripheral. * Note: The return value of this function must be ANDed with each member in * UART_LS_Type enumeration to determine current flag status * corresponding to each Line status type. Because some flags in * Line Status register will be cleared after reading, the next reading * Line Status register could not be correct. So this function used to * read Line status register in one time only, then the return value * used to check all flags. *********************************************************************/ uint8_t UART_GetLineStatus(UART_ID_Type UartID) { switch (UartID) { case UART_0: return ((LPC_UART0->LSR) & UART_LSR_BITMASK); case UART_1: return ((LPC_UART1->LSR) & UART_LSR_BITMASK); case UART_2: return ((LPC_UART2->LSR) & UART_LSR_BITMASK); case UART_3: return ((LPC_UART3->LSR) & UART_LSR_BITMASK); case UART_4: return ((LPC_UART4->LSR) & UART_LSR_BITMASK); } return 0; } /********************************************************************//** * @brief Get Interrupt Identification value * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return Current value of UART UIIR register in UART peripheral. *********************************************************************/ uint32_t UART_GetIntId(UART_ID_Type UartID) { switch (UartID) { case UART_0: return ((LPC_UART0->IIR) & UART_IIR_BITMASK); case UART_1: return ((LPC_UART1->IIR) & UART_IIR_BITMASK); case UART_2: return ((LPC_UART2->IIR) & UART_IIR_BITMASK); case UART_3: return ((LPC_UART3->IIR) & UART_IIR_BITMASK); case UART_4: return ((LPC_UART4->IIR) & UART_IIR_BITMASK); } return 0; } /*********************************************************************//** * @brief Check whether if UART is busy or not * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @return RESET if UART is not busy, otherwise return SET. **********************************************************************/ FlagStatus UART_CheckBusy(UART_ID_Type UartID) { uint32_t LSR = 0; switch (UartID) { case UART_0: LSR = (LPC_UART0)->LSR & UART_LSR_TEMT; break; case UART_1: LSR = (LPC_UART1)->LSR & UART_LSR_TEMT; break; case UART_2: LSR = (LPC_UART2)->LSR & UART_LSR_TEMT; break; case UART_3: LSR = (LPC_UART3)->LSR & UART_LSR_TEMT; break; case UART_4: LSR = (LPC_UART4)->LSR & UART_LSR_TEMT; break; } if (LSR & UART_LSR_TEMT) { return RESET; } return SET; } /*********************************************************************//** * @brief Configure FIFO function on selected UART peripheral * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that * contains specified information about FIFO configuration * @return none **********************************************************************/ void UART_FIFOConfig(UART_ID_Type UartID, UART_FIFO_CFG_Type *FIFOCfg) { uint8_t tmp = 0; tmp |= UART_FCR_FIFO_EN; switch (FIFOCfg->FIFO_Level) { case UART_FIFO_TRGLEV0: tmp |= UART_FCR_TRG_LEV0; break; case UART_FIFO_TRGLEV1: tmp |= UART_FCR_TRG_LEV1; break; case UART_FIFO_TRGLEV2: tmp |= UART_FCR_TRG_LEV2; break; case UART_FIFO_TRGLEV3: default: tmp |= UART_FCR_TRG_LEV3; break; } if (FIFOCfg->FIFO_ResetTxBuf == ENABLE) { tmp |= UART_FCR_TX_RS; } if (FIFOCfg->FIFO_ResetRxBuf == ENABLE) { tmp |= UART_FCR_RX_RS; } if (FIFOCfg->FIFO_DMAMode == ENABLE) { tmp |= UART_FCR_DMAMODE_SEL; } //write to FIFO control register switch (UartID) { case UART_0: LPC_UART0->FCR = tmp & UART_FCR_BITMASK; break; case UART_1: LPC_UART1->FCR = tmp & UART_FCR_BITMASK; break; case UART_2: LPC_UART2->FCR = tmp & UART_FCR_BITMASK; break; case UART_3: LPC_UART3->FCR = tmp & UART_FCR_BITMASK; break; case UART_4: LPC_UART4->FCR = tmp & UART_FCR_BITMASK; break; } } /*****************************************************************************//** * @brief Fills each UART_FIFOInitStruct member with its default value: * - FIFO_DMAMode = DISABLE * - FIFO_Level = UART_FIFO_TRGLEV0 * - FIFO_ResetRxBuf = ENABLE * - FIFO_ResetTxBuf = ENABLE * - FIFO_State = ENABLE * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure * which will be initialized. * @return None *******************************************************************************/ void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct) { UART_FIFOInitStruct->FIFO_DMAMode = DISABLE; UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0; UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE; UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE; } /*********************************************************************//** * @brief Start/Stop Auto Baudrate activity * @param[in] UARTx UART peripheral selected, should be * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that * contains specified information about UART * auto baudrate configuration * @param[in] NewState New State of Auto baudrate activity, should be: * - ENABLE: Start this activity * - DISABLE: Stop this activity * Note: Auto-baudrate mode enable bit will be cleared once this mode * completed. * @return none **********************************************************************/ void UART_ABCmd(UART_ID_Type UartID, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState) { uint32_t tmp; tmp = 0; if (NewState == ENABLE) { if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1) { tmp |= UART_ACR_MODE; } if (ABConfigStruct->AutoRestart == ENABLE) { tmp |= UART_ACR_AUTO_RESTART; } } if (UartID == UART_1) { if (NewState == ENABLE) { // Clear DLL and DLM value LPC_UART1->LCR |= UART_LCR_DLAB_EN; LPC_UART1->DLL = 0; LPC_UART1->DLM = 0; LPC_UART1->LCR &= ~UART_LCR_DLAB_EN; // FDR value must be reset to default value LPC_UART1->FDR = 0x10; LPC_UART1->ACR = UART_ACR_START | tmp; } else { LPC_UART1->ACR = 0; } } else if (UartID == UART_4) { if (NewState == ENABLE) { // Clear DLL and DLM value LPC_UART4->LCR |= UART_LCR_DLAB_EN; LPC_UART4->DLL = 0; LPC_UART4->DLM = 0; LPC_UART4->LCR &= ~UART_LCR_DLAB_EN; // FDR value must be reset to default value LPC_UART4->FDR = 0x10; LPC_UART4->ACR = UART_ACR_START | tmp; } else { LPC_UART4->ACR = 0; } } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); if (NewState == ENABLE) { // Clear DLL and DLM value UARTx->LCR |= UART_LCR_DLAB_EN; UARTx->DLL = 0; UARTx->DLM = 0; UARTx->LCR &= ~UART_LCR_DLAB_EN; // FDR value must be reset to default value UARTx->FDR = 0x10; UARTx->ACR = UART_ACR_START | tmp; } else { UARTx->ACR = 0; } } } /*********************************************************************//** * @brief Clear Autobaud Interrupt Pending * @param[in] UARTx UART peripheral selected, should be * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] ABIntType type of auto-baud interrupt, should be: * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt * @return none **********************************************************************/ void UART_ABClearIntPending(UART_ID_Type UartID, UART_ABEO_Type ABIntType) { if (UartID == UART_1) { LPC_UART1->ACR |= ABIntType; } else if (UartID == UART_4) { LPC_UART4->ACR |= ABIntType; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); UARTx->ACR |= ABIntType; } } /*********************************************************************//** * @brief Enable/Disable transmission on UART TxD pin * @param[in] UARTx UART peripheral selected, should be: * - UART_0: UART0 peripheral * - UART_1: UART1 peripheral * - UART_2: UART2 peripheral * - UART_3: UART3 peripheral * - UART_4: UART4 peripheral * @param[in] NewState New State of Tx transmission function, should be: * - ENABLE: Enable this function - DISABLE: Disable this function * @return none **********************************************************************/ void UART_TxCmd(UART_ID_Type UartID, FunctionalState NewState) { if (NewState == ENABLE) { if (UartID == UART_1) { LPC_UART1->TER |= UART_TER_TXEN; } else if (UartID == UART_4) { // LPC_UART4->TER |= UART4_TER_TXEN; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); UARTx->TER |= UART_TER_TXEN; } } else { if (UartID == UART_1) { LPC_UART1->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK; } else if (UartID == UART_4) { //LPC_UART4->TER &= (~UART4_TER_TXEN) & UART4_TER_BITMASK; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK; } } } /* UART IrDA functions ---------------------------------------------------*/ /*********************************************************************//** * @brief Enable or disable inverting serial input function of IrDA * on UART peripheral. * @param[in] UARTx UART peripheral selected, should be LPC_UART4 (only) * @param[in] NewState New state of inverting serial input, should be: * - ENABLE: Enable this function. * - DISABLE: Disable this function. * @return none **********************************************************************/ void UART_IrDAInvtInputCmd(UART_ID_Type UartID, FunctionalState NewState) { if (UartID != UART_4) return; if (NewState == ENABLE) { LPC_UART4->ICR |= UART_ICR_IRDAINV; } else if (NewState == DISABLE) { LPC_UART4->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK; } } /*********************************************************************//** * @brief Enable or disable IrDA function on UART peripheral. * @param[in] UARTx UART peripheral selected, should be LPC_UART4 (only) * @param[in] NewState New state of IrDA function, should be: * - ENABLE: Enable this function. * - DISABLE: Disable this function. * @return none **********************************************************************/ void UART_IrDACmd(UART_ID_Type UartID, FunctionalState NewState) { if (UartID != UART_4) return; if (NewState == ENABLE) { LPC_UART4->ICR |= UART_ICR_IRDAEN; } else { LPC_UART4->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK; } } /*********************************************************************//** * @brief Configure Pulse divider for IrDA function on UART peripheral. * @param[in] UARTx UART peripheral selected, should be LPC_UART4 (only) * @param[in] PulseDiv Pulse Divider value from Peripheral clock, * should be one of the following: - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk * @return none **********************************************************************/ void UART_IrDAPulseDivConfig(UART_ID_Type UartID, UART_IrDA_PULSE_Type PulseDiv) { uint32_t tmp, tmp1; if (UartID != UART_4) return; tmp1 = UART_ICR_PULSEDIV(PulseDiv); tmp = LPC_UART4->ICR & (~ UART_ICR_PULSEDIV(7)); tmp |= tmp1 | UART_ICR_FIXPULSE_EN; LPC_UART4->ICR = tmp & UART_ICR_BITMASK; } /* UART1 FullModem function ---------------------------------------------*/ /*********************************************************************//** * @brief Force pin DTR/RTS corresponding to given state (Full modem mode) * @param[in] UARTx LPC_UART1 (only) * @param[in] Pin Pin that NewState will be applied to, should be: * - UART1_MODEM_PIN_DTR: DTR pin. * - UART1_MODEM_PIN_RTS: RTS pin. * @param[in] NewState New State of DTR/RTS pin, should be: * - INACTIVE: Force the pin to inactive signal. - ACTIVE: Force the pin to active signal. * @return none **********************************************************************/ void UART_FullModemForcePinState(UART_ID_Type UartID, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState) { uint8_t tmp = 0; if (UartID != UART_1) return; switch (Pin) { case UART1_MODEM_PIN_DTR: tmp = UART1_MCR_DTR_CTRL; break; case UART1_MODEM_PIN_RTS: tmp = UART1_MCR_RTS_CTRL; break; default: break; } if (NewState == ACTIVE) { LPC_UART1->MCR |= tmp; } else { LPC_UART1->MCR &= (~tmp) & UART1_MCR_BITMASK; } } /*********************************************************************//** * @brief Configure Full Modem mode for UART peripheral * @param[in] UARTx LPC_UART1 (only) * @param[in] Mode Full Modem mode, should be: * - UART1_MODEM_MODE_LOOPBACK: Loop back mode. * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode. * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode. * @param[in] NewState New State of this mode, should be: * - ENABLE: Enable this mode. - DISABLE: Disable this mode. * @return none **********************************************************************/ void UART_FullModemConfigMode(UART_ID_Type UartID, UART_MODEM_MODE_Type Mode, FunctionalState NewState) { uint8_t tmp; if(UartID != UART_1) return; switch(Mode) { case UART1_MODEM_MODE_LOOPBACK: tmp = UART1_MCR_LOOPB_EN; break; case UART1_MODEM_MODE_AUTO_RTS: tmp = UART1_MCR_AUTO_RTS_EN; break; case UART1_MODEM_MODE_AUTO_CTS: tmp = UART1_MCR_AUTO_CTS_EN; break; default: break; } if (NewState == ENABLE) { LPC_UART1->MCR |= tmp; } else { LPC_UART1->MCR &= (~tmp) & UART1_MCR_BITMASK; } } /*********************************************************************//** * @brief Get current status of modem status register * @param[in] UARTx LPC_UART1 (only) * @return Current value of modem status register * Note: The return value of this function must be ANDed with each member * UART_MODEM_STAT_type enumeration to determine current flag status * corresponding to each modem flag status. Because some flags in * modem status register will be cleared after reading, the next reading * modem register could not be correct. So this function used to * read modem status register in one time only, then the return value * used to check all flags. **********************************************************************/ uint8_t UART_FullModemGetStatus(UART_ID_Type UartID) { if(UartID != UART_1) return 0; return ((LPC_UART1->MSR) & UART1_MSR_BITMASK); } /* UART RS485 functions --------------------------------------------------------------*/ /*********************************************************************//** * @brief Configure UART peripheral in RS485 mode according to the specified * parameters in the RS485ConfigStruct. * @param[in] UARTx LPC_UART0 ~LPC_UART4 * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure * that contains the configuration information for specified UART * in RS485 mode. * @return None **********************************************************************/ void UART_RS485Config(UART_ID_Type UartID, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct) { uint32_t tmp; __IO uint32_t *RS485DLY, *ADRMATCH, *RS485CTRL, *LCR; tmp = 0; if (UartID == UART_1) { RS485DLY = (__IO uint32_t *)&LPC_UART1->RS485DLY; ADRMATCH = (__IO uint32_t *)&LPC_UART1->ADRMATCH; LCR = (__IO uint32_t *)&LPC_UART1->LCR; RS485CTRL = (__IO uint32_t *)&LPC_UART1->RS485CTRL; } else if (UartID == UART_4) { RS485DLY = (__IO uint32_t *)&LPC_UART4->RS485DLY; ADRMATCH = (__IO uint32_t *)&LPC_UART4->ADRMATCH; LCR = (__IO uint32_t *)&LPC_UART4->LCR; RS485CTRL = (__IO uint32_t *)&LPC_UART4->RS485CTRL; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); RS485DLY = (__IO uint32_t *)&UARTx->RS485DLY; ADRMATCH = (__IO uint32_t *)&UARTx->ADRMATCH; LCR = (__IO uint32_t *)&UARTx->LCR; RS485CTRL = (__IO uint32_t *)&UARTx->RS485CTRL; } // If Auto Direction Control is enabled - This function is used in Master mode if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE) { tmp |= UART_RS485CTRL_DCTRL_EN; // Set polar if (RS485ConfigStruct->DirCtrlPol_Level == SET) { tmp |= UART_RS485CTRL_OINV_1; } // Set pin according to. This condition is only with UART1. The others are used // OE pin as default for control the direction of RS485 buffer IC if ((RS485ConfigStruct->DirCtrlPin == UART_RS485_DIRCTRL_DTR) && (UartID == UART_1)) { tmp |= UART_RS485CTRL_SEL_DTR; } // Fill delay time *RS485DLY = RS485ConfigStruct->DelayValue & UART_RS485DLY_BITMASK; } // MultiDrop mode is enable if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE) { tmp |= UART_RS485CTRL_NMM_EN; } // Auto Address Detect function if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE) { tmp |= UART_RS485CTRL_AADEN; // Fill Match Address *ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART_RS485ADRMATCH_BITMASK; } // Receiver is disable if (RS485ConfigStruct->Rx_State == DISABLE) { tmp |= UART_RS485CTRL_RX_DIS; } // write back to RS485 control register *RS485CTRL = tmp & UART_RS485CTRL_BITMASK; // Enable Parity function and leave parity in stick '0' parity as default *LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN); } /*********************************************************************//** * @brief Enable/Disable receiver in RS485 module in UART1 * @param[in] UARTx LPC_UART1 (only) * @param[in] NewState New State of command, should be: * - ENABLE: Enable this function. * - DISABLE: Disable this function. * @return None **********************************************************************/ void UART_RS485ReceiverCmd(UART_ID_Type UartID, FunctionalState NewState) { __IO uint32_t *RS485CTRL; if (UartID == UART_1) { RS485CTRL = (__IO uint32_t *)&LPC_UART1->RS485DLY; } else if (UartID == UART_4) { RS485CTRL = (__IO uint32_t *)&LPC_UART4->RS485DLY; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); RS485CTRL = (__IO uint32_t *)&UARTx->RS485DLY; } if (NewState == ENABLE) { *RS485CTRL &= ~UART_RS485CTRL_RX_DIS; } else { *RS485CTRL |= UART_RS485CTRL_RX_DIS; } } /*********************************************************************//** * @brief Send data on RS485 bus with specified parity stick value (9-bit mode). * @param[in] UARTx LPC_UART1 (only) * @param[in] pDatFrm Pointer to data frame. * @param[in] size Size of data. * @param[in] ParityStick Parity Stick value, should be 0 or 1. * @return None **********************************************************************/ uint32_t UART_RS485Send(UART_ID_Type UartID, uint8_t *pDatFrm, uint32_t size, uint8_t ParityStick) { uint8_t tmp, save; uint32_t cnt; __IO uint32_t *LCR, *LSR; if (UartID == UART_1) { LCR = (__IO uint32_t *)&LPC_UART1->LCR; LSR = (__IO uint32_t *)&LPC_UART1->LSR; } else if (UartID == UART_4) { LCR = (__IO uint32_t *)&LPC_UART4->LCR; LSR = (__IO uint32_t *)&LPC_UART4->LSR; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); LCR = (__IO uint32_t *)&UARTx->LCR; LSR = (__IO uint32_t *)&UARTx->LSR; } if (ParityStick) { save = tmp = *LCR & UART_LCR_BITMASK; tmp &= ~(UART_LCR_PARITY_EVEN); *LCR = tmp; cnt = UART_Send(UartID, pDatFrm, size, BLOCKING); while (!(*LSR & UART_LSR_TEMT)); *LCR = save; } else { cnt = UART_Send(UartID, pDatFrm, size, BLOCKING); while (!(*LSR & UART_LSR_TEMT)); } return cnt; } /*********************************************************************//** * @brief Send Slave address frames on RS485 bus. * @param[in] UARTx LPC_UART1 (only) * @param[in] SlvAddr Slave Address. * @return None **********************************************************************/ void UART_RS485SendSlvAddr(UART_ID_Type UartID, uint8_t SlvAddr) { UART_RS485Send(UartID, &SlvAddr, 1, 1); } /*********************************************************************//** * @brief Send Data frames on RS485 bus. * @param[in] UARTx LPC_UART1 (only) * @param[in] pData Pointer to data to be sent. * @param[in] size Size of data frame to be sent. * @return None **********************************************************************/ uint32_t UART_RS485SendData(UART_ID_Type UartID, uint8_t *pData, uint32_t size) { return (UART_RS485Send(UartID, pData, size, 0)); } /** * @} */ #endif /*_UART*/ /** * @} */ /* --------------------------------- End Of File ------------------------------ */ |
#include "lpc177x_8x_gpio.h" #include "lpc177x_8x_timer.h" #include "lpc177x_8x_uart.h" #include "lpc177x_8x_clkpwr.h" #include "core_cm3.h" void HardFault_Handler(void) { while(1) { } } int main() { //Try to set up UART UART_CFG_Type cfg; UART_FIFO_CFG_Type UARTFIFOConfigStruct; //setting these to '1' gives UART0 control of p0[2,3] PINSEL_ConfigPin(0, 2, 1); PINSEL_ConfigPin(0, 3, 1); UART_ConfigStructInit(&cfg); UART_Init(UART_0, &cfg); UART_FIFOConfigStructInit(&UARTFIFOConfigStruct); UART_FIFOConfig(UART_0, &UARTFIFOConfigStruct); UART_TxCmd(UART_0, ENABLE); while(1) { } return 0; } |
SEGGER J-Link GDB Server V4.94c Command Line Version JLinkARM.dll V4.94c (DLL compiled Oct 31 2014 20:00:27) -----GDB Server start settings----- GDBInit file: none GDB Server Listening port: 2331 SWO raw output listening port: 2332 Terminal I/O port: 2333 Accept remote connection: yes Generate logfile: off Verify download: off Init regs on start: on Silent mode: off Single run mode: off Target connection timeout: 5 sec. ------J-Link related settings------ J-Link Host interface: USB J-Link script: none J-Link settings file: none ------Target related settings------ Target device: unspecified Target interface: JTAG Target interface speed: 1000kHz Target endian: little Connecting to J-Link... J-Link is connected. Firmware: J-Link V9 compiled Oct 28 2014 19:25:34 Hardware: V9.00 S/N: 269301524 OEM: SEGGER-EDU Feature(s): FlashBP, GDB Checking target voltage... Target voltage: 3.30 V Listening on TCP/IP port 2331 Connecting to target... J-Link found 1 JTAG device, Total IRLen = 4 JTAG ID: 0x4BA00477 (Cortex-M3) Connected to target Waiting for GDB connection...Connected to 127.0.0.1 Reading all registers Read 4 bytes @ address 0x00000000 (Data = 0x10010000) Halting target CPU... ...Target halted (PC = 0x00000000) Downloading 14120 bytes @ address 0x00000000 Downloading 8 bytes @ address 0x00003728 Downloading 184 bytes @ address 0x00003730 Writing register (PC = 0x00002a48) ... |
arm-none-eabi-gdb my_file.elf |
GNU gdb (GNU Tools for ARM Embedded Processors) 7.6.0.20140731-cvs Copyright (C) 2013 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "--host=i686-linux-gnu --target=arm-none-eabi". For bug reporting instructions, please see: <http://www.gnu.org/software/gdb/bugs/>... Reading symbols from /home/ghost/embedded/arm/code/gps_map/0000_new_cmsis_test/LPC177x_8x_test.elf...done. (gdb) target remote localhost:2331 Remote debugging using localhost:2331 0x00000000 in __isr_vector () (gdb) monitor halt (gdb) load Loading section .text, size 0x3728 lma 0x0 Loading section .ARM.exidx, size 0x8 lma 0x3728 Loading section .data, size 0xb8 lma 0x3730 Start address 0x2a48, load size 14312 Transfer rate: 49 KB/sec, 4770 bytes/write. (gdb) break main Breakpoint 1 at 0xe6: file main.c, line 16. (gdb) break HardFault_Handler Breakpoint 2 at 0x100: file main.c, line 25. (gdb) continue Continuing. |
Continuing. ^C Program received signal SIGTRAP, Trace/breakpoint trap. UART_FIFOConfig (UartID=UART_0, FIFOCfg=0x1000ff30) at Drivers/source/lpc177x_8x_uart.c:1129 1129 if (FIFOCfg->FIFO_ResetRxBuf == ENABLE) |
(gdb) c Continuing. ^C Program received signal SIGTRAP, Trace/breakpoint trap. UART_FIFOConfig (UartID=UART_0, FIFOCfg=0x1000ff30) at Drivers/source/lpc177x_8x_uart.c:1129 1129 if (FIFOCfg->FIFO_ResetRxBuf == ENABLE) (gdb) n 1126 tmp |= UART_FCR_TX_RS; (gdb) 1134 if (FIFOCfg->FIFO_DMAMode == ENABLE) (gdb) 1131 tmp |= UART_FCR_RX_RS; (gdb) 1134 if (FIFOCfg->FIFO_DMAMode == ENABLE) (gdb) 1141 switch (UartID) (gdb) 1131 tmp |= UART_FCR_RX_RS; (gdb) 1134 if (FIFOCfg->FIFO_DMAMode == ENABLE) (gdb) 1141 switch (UartID) (gdb) c Continuing. |
ARM GAS /tmp/ccSGB01A.s page 1 1 .syntax unified 2 .cpu cortex-m3 3 .fpu softvfp 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 4 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .thumb 14 .file"main.c" 15 .text 16 .Ltext0: 17 .cfi_sections.debug_frame 18 .section.text.HardFault_Handler,"ax",%progbits 19 .align1 20 .globalHardFault_Handler 21 .thumb 22 .thumb_func 24 HardFault_Handler: 25 .LFB55: 26 .file 1 "main.c" 1:main.c **** #include "lpc177x_8x_gpio.h" 2:main.c **** #include "lpc177x_8x_timer.h" 3:main.c **** #include "lpc177x_8x_uart.h" 4:main.c **** #include "lpc177x_8x_clkpwr.h" 5:main.c **** #include "core_cm3.h" 6:main.c **** 7:main.c **** 8:main.c **** void HardFault_Handler(void) 9:main.c **** { 27 .loc 1 9 0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 32 30 @ frame_needed = 0, uses_anonymous_args = 0 31 0000 70B5 push{r4, r5, r6, lr} 32 .LCFI0: 33 .cfi_def_cfa_offset 16 34 .cfi_offset 4, -16 35 .cfi_offset 5, -12 36 .cfi_offset 6, -8 37 .cfi_offset 14, -4 38 0002 88B0 subsp, sp, #32 39 .LCFI1: 40 .cfi_def_cfa_offset 48 10:main.c **** uint32_t bfar = SCB->BFAR; 41 .loc 1 10 0 42 0004 404B ldrr3, .L26 43 0006 9C6B ldrr4, [r3, #56] 44 .LVL0: 11:main.c **** uint32_t reg; 12:main.c **** uint8_t regval[12]; 13:main.c **** regval[0] = '0'; 45 .loc 1 13 0 ARM GAS /tmp/ccSGB01A.s page 2 46 0008 3023 movsr3, #48 47 000a 8DF80830 strbr3, [sp, #8] 14:main.c **** regval[1] = 'x'; 48 .loc 1 14 0 49 000e 7823 movsr3, #120 50 0010 8DF80930 strbr3, [sp, #9] 15:main.c **** regval[11] = '\r'; 51 .loc 1 15 0 52 0014 0D23 movsr3, #13 53 0016 8DF81330 strbr3, [sp, #19] 16:main.c **** regval[10] = '\n'; 54 .loc 1 16 0 55 001a 0A23 movsr3, #10 56 001c 8DF81230 strbr3, [sp, #18] 57 .L2: 17:main.c **** 18:main.c **** while(1) 19:main.c **** { 20:main.c **** //Bus fault 21:main.c **** if(SCB->CFSR & SCB_CFSR_BUSFAULTSR_Msk) 58 .loc 1 21 0 59 0020 394B ldrr3, .L26 60 0022 986A ldrr0, [r3, #40] 61 0024 10F47F46 andsr6, r0, #65280 62 0028 4ED0 beq.L3 63 .LBB5: 22:main.c **** { 23:main.c **** reg = SCB->CFSR; 24:main.c **** uint8_t msg[] = "bus fault: "; 64 .loc 1 24 0 65 002a 384A ldrr2, .L26+4 23:main.c **** reg = SCB->CFSR; 66 .loc 1 23 0 67 002c 9D6A ldrr5, [r3, #40] 68 .LVL1: 69 .loc 1 24 0 70 002e 1068 ldrr0, [r2]@ unaligned 71 0030 5168 ldrr1, [r2, #4]@ unaligned 72 0032 05AB addr3, sp, #20 73 0034 03C3 stmiar3!, {r0, r1} 74 0036 9068 ldrr0, [r2, #8]@ unaligned 25:main.c **** UART_Send(UART_0, msg, 11, BLOCKING); 75 .loc 1 25 0 76 0038 05A9 addr1, sp, #20 24:main.c **** uint8_t msg[] = "bus fault: "; 77 .loc 1 24 0 78 003a 1860 strr0, [r3]@ unaligned 79 .loc 1 25 0 80 003c 0B22 movsr2, #11 81 003e 0123 movsr3, #1 82 0040 0020 movsr0, #0 83 0042 FFF7FEFF blUART_Send 84 .LVL2: 85 0046 0023 movsr3, #0 86 .LVL3: 87 .L7: 88 0048 9A00 lslsr2, r3, #2 ARM GAS /tmp/ccSGB01A.s page 3 89 004a C2F11C02 rsbr2, r2, #28 90 .LBB6: 26:main.c **** 27:main.c **** char i; 28:main.c **** for(i = 0; i < 8; i++) 29:main.c **** { 30:main.c **** uint8_t nibble = (reg>>4*(7-i)) & 0x0f; 91 .loc 1 30 0 92 004e 25FA02F2 lsrr2, r5, r2 93 0052 02A9 addr1, sp, #8 94 0054 02F00F02 andr2, r2, #15 95 .LVL4: 31:main.c **** regval[i+2] = nibble < 10 ? nibble + '0' : nibble + 'a' - 10; 96 .loc 1 31 0 97 0058 092A cmpr2, #9 98 005a 1944 addr1, r1, r3 99 005c 03F10103 addr3, r3, #1 100 .LVL5: 101 0060 94BF itels 102 0062 3032 addlsr2, r2, #48 103 .LVL6: 104 0064 5732 addhir2, r2, #87 105 .LBE6: 28:main.c **** for(i = 0; i < 8; i++) 106 .loc 1 28 0 107 0066 082B cmpr3, #8 108 .LBB7: 109 .loc 1 31 0 110 0068 8A70 strbr2, [r1, #2] 111 .LVL7: 112 .LBE7: 28:main.c **** for(i = 0; i < 8; i++) 113 .loc 1 28 0 114 006a EDD1 bne.L7 32:main.c **** } 33:main.c **** 34:main.c **** UART_Send(UART_0, regval, 12, BLOCKING); 115 .loc 1 34 0 116 006c 0123 movsr3, #1 117 .LVL8: 118 006e 0020 movsr0, #0 119 0070 02A9 addr1, sp, #8 120 0072 0C22 movsr2, #12 121 0074 FFF7FEFF blUART_Send 122 .LVL9: 35:main.c **** 36:main.c **** //If BFAR is valid 37:main.c **** if(reg & 1<<15) 123 .loc 1 37 0 124 0078 2B04 lslsr3, r5, #16 125 007a D1D5 bpl.L2 126 .LBB8: 38:main.c **** { 39:main.c **** uint8_t msg[] = "BFAR: "; 127 .loc 1 39 0 128 007c 244B ldrr3, .L26+8 40:main.c **** UART_Send(UART_0, msg, 6, BLOCKING); ARM GAS /tmp/ccSGB01A.s page 4 129 .loc 1 40 0 130 007e 6946 movr1, sp 39:main.c **** uint8_t msg[] = "BFAR: "; 131 .loc 1 39 0 132 0080 1868 ldrr0, [r3]@ unaligned 133 0082 9A88 ldrhr2, [r3, #4]@ unaligned 134 0084 9B79 ldrbr3, [r3, #6]@ zero_extendqisi2 135 0086 0090 strr0, [sp]@ unaligned 136 0088 ADF80420 strhr2, [sp, #4]@ unaligned 137 008c 8DF80630 strbr3, [sp, #6] 138 .loc 1 40 0 139 0090 0020 movsr0, #0 140 0092 0123 movsr3, #1 141 0094 0622 movsr2, #6 142 0096 FFF7FEFF blUART_Send 143 .LVL10: 144 009a 0023 movsr3, #0 145 .LVL11: 146 .L12: 147 009c 9A00 lslsr2, r3, #2 148 009e C2F11C02 rsbr2, r2, #28 149 .LBB9: 41:main.c **** 42:main.c **** char i; 43:main.c **** for(i = 0; i < 8; i++) 44:main.c **** { 45:main.c **** uint8_t nibble = (bfar>>4*(7-i)) & 0x0f; 150 .loc 1 45 0 151 00a2 24FA02F2 lsrr2, r4, r2 152 00a6 02A9 addr1, sp, #8 153 00a8 02F00F02 andr2, r2, #15 154 .LVL12: 46:main.c **** regval[i+2] = nibble < 10 ? nibble + '0' : nibble + 'a' - 10; 155 .loc 1 46 0 156 00ac 092A cmpr2, #9 157 00ae 1944 addr1, r1, r3 158 00b0 03F10103 addr3, r3, #1 159 .LVL13: 160 00b4 94BF itels 161 00b6 3032 addlsr2, r2, #48 162 .LVL14: 163 00b8 5732 addhir2, r2, #87 164 .LBE9: 43:main.c **** for(i = 0; i < 8; i++) 165 .loc 1 43 0 166 00ba 082B cmpr3, #8 167 .LBB10: 168 .loc 1 46 0 169 00bc 8A70 strbr2, [r1, #2] 170 .LVL15: 171 .LBE10: 43:main.c **** for(i = 0; i < 8; i++) 172 .loc 1 43 0 173 00be EDD1 bne.L12 47:main.c **** } 48:main.c **** 49:main.c **** UART_Send(UART_0, regval, 12, BLOCKING); ARM GAS /tmp/ccSGB01A.s page 5 174 .loc 1 49 0 175 00c0 0020 movsr0, #0 176 00c2 02A9 addr1, sp, #8 177 00c4 0C22 movsr2, #12 178 00c6 1BE0 b.L24 179 .LVL16: 180 .L3: 181 .LBE8: 182 .LBE5: 50:main.c **** } 51:main.c **** } 52:main.c **** //Memory fault 53:main.c **** else if(SCB->CFSR & SCB_CFSR_MEMFAULTSR_Msk) 183 .loc 1 53 0 184 00c8 9A6A ldrr2, [r3, #40] 185 00ca 12F0FF05 andsr5, r2, #255 186 00ce 08D0 beq.L14 187 .LBB11: 54:main.c **** { 55:main.c **** uint8_t msg[] = "mem fault\n\r"; 188 .loc 1 55 0 189 00d0 104A ldrr2, .L26+12 190 00d2 05AB addr3, sp, #20 191 00d4 1068 ldrr0, [r2]@ unaligned 192 00d6 5168 ldrr1, [r2, #4]@ unaligned 193 00d8 03C3 stmiar3!, {r0, r1} 194 00da 9068 ldrr0, [r2, #8]@ unaligned 195 00dc 1860 strr0, [r3]@ unaligned 56:main.c **** UART_Send(UART_0, msg, 11, BLOCKING); 196 .loc 1 56 0 197 00de 3046 movr0, r6 198 00e0 0CE0 b.L23 199 .L14: 200 .LBE11: 57:main.c **** } 58:main.c **** //Usage fault 59:main.c **** else if(SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk) 201 .loc 1 59 0 202 00e2 9B6A ldrr3, [r3, #40] 203 00e4 1B0C lsrsr3, r3, #16 204 00e6 1B04 lslsr3, r3, #16 205 00e8 002B cmpr3, #0 206 00ea 99D0 beq.L2 207 .LBB12: 60:main.c **** { 61:main.c **** uint8_t msg[] = "usg fault\n\r"; 208 .loc 1 61 0 209 00ec 0A4A ldrr2, .L26+16 210 00ee 05AB addr3, sp, #20 211 00f0 1068 ldrr0, [r2]@ unaligned 212 00f2 5168 ldrr1, [r2, #4]@ unaligned 213 00f4 03C3 stmiar3!, {r0, r1} 214 00f6 9068 ldrr0, [r2, #8]@ unaligned 215 00f8 1860 strr0, [r3]@ unaligned 62:main.c **** UART_Send(UART_0, msg, 11, BLOCKING); 216 .loc 1 62 0 217 00fa 2846 movr0, r5 ARM GAS /tmp/ccSGB01A.s page 6 218 .L23: 219 00fc 05A9 addr1, sp, #20 220 00fe 0B22 movsr2, #11 221 .L24: 222 0100 0123 movsr3, #1 223 0102 FFF7FEFF blUART_Send 224 .LVL17: 225 0106 8BE7 b.L2 226 .L27: 227 .align2 228 .L26: 229 0108 00ED00E0 .word-536810240 230 010c 00000000 .word.LC0 231 0110 0C000000 .word.LC1 232 0114 13000000 .word.LC2 233 0118 1F000000 .word.LC3 234 .LBE12: 235 .cfi_endproc 236 .LFE55: 238 .section.text.uart_get_pointer,"ax",%progbits 239 .align1 240 .globaluart_get_pointer 241 .thumb 242 .thumb_func 244 uart_get_pointer: 245 .LFB56: 63:main.c **** } 64:main.c **** } 65:main.c **** 66:main.c **** } 67:main.c **** 68:main.c **** 69:main.c **** 70:main.c **** LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID) 71:main.c **** { 246 .loc 1 71 0 247 .cfi_startproc 248 @ args = 0, pretend = 0, frame = 0 249 @ frame_needed = 0, uses_anonymous_args = 0 250 @ link register save eliminated. 251 .LVL18: 252 .LVL19: 253 0000 0328 cmpr0, #3 254 0002 9ABF ittels 255 0004 024B ldrlsr3, .L31 256 0006 53F82000 ldrlsr0, [r3, r0, lsl #2] 257 .LVL20: 258 .loc 1 71 0 259 000a 0020 movhir0, #0 260 .LVL21: 72:main.c **** LPC_UART_TypeDef *UARTx = NULL; 73:main.c **** switch(UartID) 74:main.c **** { 75:main.c **** case UART_0: 76:main.c **** UARTx = LPC_UART0; 77:main.c **** break; 78:main.c **** case UART_2: ARM GAS /tmp/ccSGB01A.s page 7 79:main.c **** UARTx = LPC_UART2; 80:main.c **** break; 81:main.c **** case UART_3: 82:main.c **** UARTx = LPC_UART3; 83:main.c **** break; 84:main.c **** default: 85:main.c **** break; 86:main.c **** } 87:main.c **** return UARTx; 88:main.c **** } 261 .loc 1 88 0 262 000c 7047 bxlr 263 .L32: 264 000e 00BF .align2 265 .L31: 266 0010 00000000 .word.LANCHOR0 267 .cfi_endproc 268 .LFE56: 270 .global__aeabi_uldivmod 271 .section.text.uart_set_divisors,"ax",%progbits 272 .align1 273 .globaluart_set_divisors 274 .thumb 275 .thumb_func 277 uart_set_divisors: 278 .LFB57: 89:main.c **** 90:main.c **** 91:main.c **** Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate) 92:main.c **** { 279 .loc 1 92 0 280 .cfi_startproc 281 @ args = 0, pretend = 0, frame = 48 282 @ frame_needed = 0, uses_anonymous_args = 0 283 .LVL22: 284 0000 2DE9F04F push{r4, r5, r6, r7, r8, r9, r10, fp, lr} 285 .LCFI2: 286 .cfi_def_cfa_offset 36 287 .cfi_offset 4, -36 288 .cfi_offset 5, -32 289 .cfi_offset 6, -28 290 .cfi_offset 7, -24 291 .cfi_offset 8, -20 292 .cfi_offset 9, -16 293 .cfi_offset 10, -12 294 .cfi_offset 11, -8 295 .cfi_offset 14, -4 296 0004 8DB0 subsp, sp, #52 297 .LCFI3: 298 .cfi_def_cfa_offset 88 299 .LVL23: 300 .loc 1 92 0 301 0006 0746 movr7, r0 93:main.c **** Status errorStatus = ERROR; 94:main.c **** 95:main.c **** uint32_t uClk; 96:main.c **** uint32_t d, m, bestd, bestm, tmp; ARM GAS /tmp/ccSGB01A.s page 8 97:main.c **** UNS_64 best_divisor, divisor; 98:main.c **** uint32_t current_error, best_error; 99:main.c **** uint32_t recalcbaud; 100:main.c **** 101:main.c **** /* get UART block clock */ 102:main.c **** uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER); 302 .loc 1 102 0 303 0008 0120 movsr0, #1 304 .LVL24: 92:main.c **** { 305 .loc 1 92 0 306 000a 0C46 movr4, r1 307 .loc 1 102 0 308 000c FFF7FEFF blCLKPWR_GetCLK 309 .LVL25: 103:main.c **** 104:main.c **** /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers 105:main.c **** * The formula is : 106:main.c **** * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL) 107:main.c **** * It involves floating point calculations. That's the reason the formulae are adjusted with 108:main.c **** * Multiply and divide method.*/ 109:main.c **** 110:main.c **** /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions: 111:main.c **** * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */ 112:main.c **** best_error = 0xFFFFFFFF; /* Worst case */ 113:main.c **** bestd = 0; 114:main.c **** bestm = 0; 115:main.c **** best_divisor = 0; 116:main.c **** 117:main.c **** for (m = 1 ; m <= 15 ;m++) 118:main.c **** { 119:main.c **** for (d = 0 ; d < m ; d++) 120:main.c **** { 121:main.c **** divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d)); 310 .loc 1 121 0 311 0010 0109 lsrsr1, r0, #4 312 0012 0207 lslsr2, r0, #28 313 0014 0391 strr1, [sp, #12] 314 0016 0292 strr2, [sp, #8] 102:main.c **** uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER); 315 .loc 1 102 0 316 0018 8446 movip, r0 317 .LVL26: 114:main.c **** bestm = 0; 318 .loc 1 114 0 319 001a 0025 movsr5, #0 320 .loc 1 121 0 321 001c DDE90201 ldrdr0, [sp, #8] 322 .LVL27: 323 0020 CDE90401 strdr0, [sp, #16] 112:main.c **** best_error = 0xFFFFFFFF; /* Worst case */ 324 .loc 1 112 0 325 0024 4FF0FF31 movr1, #-1 326 .loc 1 121 0 327 0028 0994 strr4, [sp, #36] 117:main.c **** for (m = 1 ; m <= 15 ;m++) 328 .loc 1 117 0 ARM GAS /tmp/ccSGB01A.s page 9 329 002a 0126 movsr6, #1 112:main.c **** best_error = 0xFFFFFFFF; /* Worst case */ 330 .loc 1 112 0 331 002c 0891 strr1, [sp, #32] 115:main.c **** best_divisor = 0; 332 .loc 1 115 0 333 002e 4FF0000A movr10, #0 334 0032 4FF0000B movfp, #0 113:main.c **** bestd = 0; 335 .loc 1 113 0 336 0036 0095 strr5, [sp] 337 .LVL28: 338 .L34: 92:main.c **** { 339 .loc 1 92 0 discriminator 1 340 0038 0999 ldrr1, [sp, #36] 341 003a 0022 movsr2, #0 342 003c 0791 strr1, [sp, #28] 343 003e 0692 strr2, [sp, #24] 344 .LVL29: 345 .L40: 346 .loc 1 121 0 347 0040 DDF81C80 ldrr8, [sp, #28] 348 0044 4FF00009 movr9, #0 349 0048 4246 movr2, r8 350 004a 4B46 movr3, r9 351 004c DDE90401 ldrdr0, [sp, #16] 352 0050 CDF804C0 strip, [sp, #4] 353 0054 FFF7FEFF bl__aeabi_uldivmod 354 .LVL30: 122:main.c **** current_error = divisor & 0xFFFFFFFF; 123:main.c **** 124:main.c **** tmp = divisor>>32; 125:main.c **** 126:main.c **** /* Adjust error */ 127:main.c **** if(current_error > ((uint32_t)1<<31)) 355 .loc 1 127 0 356 0058 B0F1004F cmpr0, #-2147483648 124:main.c **** tmp = divisor>>32; 357 .loc 1 124 0 358 005c 0A46 movr2, r1 128:main.c **** { 129:main.c **** current_error = -current_error; 130:main.c **** tmp++; 359 .loc 1 130 0 360 005e 88BF ithi 361 0060 4A1C addhir2, r1, #1 131:main.c **** } 132:main.c **** 133:main.c **** /* Out of range */ 134:main.c **** if(tmp < 1 || tmp > 65536) 362 .loc 1 134 0 363 0062 02F1FF31 addr1, r2, #-1 122:main.c **** current_error = divisor & 0xFFFFFFFF; 364 .loc 1 122 0 365 0066 0346 movr3, r0 129:main.c **** current_error = -current_error; ARM GAS /tmp/ccSGB01A.s page 10 366 .loc 1 129 0 367 0068 88BF ithi 368 006a 4342 rsbhir3, r0, #0 369 .LVL31: 370 .loc 1 134 0 371 006c B1F5803F cmpr1, #65536 127:main.c **** if(current_error > ((uint32_t)1<<31)) 372 .loc 1 127 0 373 0070 DDF804C0 ldrip, [sp, #4] 374 .LVL32: 375 .loc 1 134 0 376 0074 0AD2 bcs.L36 135:main.c **** continue; 136:main.c **** 137:main.c **** if( current_error < best_error) 377 .loc 1 137 0 378 0076 0898 ldrr0, [sp, #32] 379 .LVL33: 380 0078 8342 cmpr3, r0 381 007a 07D2 bcs.L36 382 .LVL34: 138:main.c **** { 139:main.c **** best_error = current_error; 140:main.c **** best_divisor = tmp; 383 .loc 1 140 0 384 007c 9246 movr10, r2 385 007e 4FF0000B movfp, #0 386 .LVL35: 141:main.c **** bestd = d; 142:main.c **** bestm = m; 143:main.c **** 144:main.c **** if(best_error == 0) 387 .loc 1 144 0 388 0082 03B3 cbzr3, .L47 389 0084 0699 ldrr1, [sp, #24] 390 0086 0893 strr3, [sp, #32] 391 0088 3546 movr5, r6 392 008a 0091 strr1, [sp] 393 .LVL36: 394 .L36: 119:main.c **** for (d = 0 ; d < m ; d++) 395 .loc 1 119 0 396 008c 069A ldrr2, [sp, #24] 397 .LVL37: 398 008e 079B ldrr3, [sp, #28] 399 .LVL38: 400 0090 0132 addsr2, r2, #1 401 0092 2344 addr3, r3, r4 402 0094 B242 cmpr2, r6 403 0096 0692 strr2, [sp, #24] 404 .LVL39: 405 0098 0793 strr3, [sp, #28] 406 009a D1D3 bcc.L40 145:main.c **** break; 146:main.c **** } 147:main.c **** } /* end of inner for loop */ 148:main.c **** ARM GAS /tmp/ccSGB01A.s page 11 149:main.c **** if (best_error == 0) 407 .loc 1 149 0 408 009c 0898 ldrr0, [sp, #32] 409 009e 70B1 cbzr0, .L39 410 00a0 0999 ldrr1, [sp, #36] 411 00a2 DDE90423 ldrdr2, [sp, #16] 412 .LVL40: 413 00a6 2144 addr1, r1, r4 117:main.c **** for (m = 1 ; m <= 15 ;m++) 414 .loc 1 117 0 415 00a8 0136 addsr6, r6, #1 416 .LVL41: 417 00aa 0991 strr1, [sp, #36] 418 00ac DDE90201 ldrdr0, [sp, #8] 419 00b0 1218 addsr2, r2, r0 420 00b2 43EB0103 adcr3, r3, r1 421 00b6 102E cmpr6, #16 422 00b8 CDE90423 strdr2, [sp, #16] 423 00bc BCD1 bne.L34 424 .L39: 425 .LVL42: 150:main.c **** break; 151:main.c **** } /* end of outer for loop */ 152:main.c **** 153:main.c **** /* can not find best match */ 154:main.c **** if(best_divisor == 0) 426 .loc 1 154 0 427 00be 5AEA0B03 orrsr3, r10, fp 428 00c2 69D0 beq.L51 429 00c4 02E0 b.L37 430 .LVL43: 431 .L47: 432 00c6 0698 ldrr0, [sp, #24] 433 00c8 3546 movr5, r6 434 00ca 0090 strr0, [sp] 435 .LVL44: 436 .L37: 155:main.c **** { 156:main.c **** return ERROR; 157:main.c **** } 158:main.c **** 159:main.c **** recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd)); 437 .loc 1 159 0 438 00cc 0099 ldrr1, [sp] 439 00ce 4FEA1C13 lsrr3, ip, #4 440 00d2 2944 addr1, r1, r5 441 00d4 03FB05F0 mulr0, r3, r5 442 00d8 A1FB0A23 umullr2, r3, r1, r10 443 00dc 01FB0B33 mlar3, r1, fp, r3 444 00e0 0021 movsr1, #0 445 00e2 FFF7FEFF bl__aeabi_uldivmod 446 .LVL45: 160:main.c **** 161:main.c **** /* reuse best_error to evaluate baud error*/ 162:main.c **** if(baudrate > recalcbaud) 447 .loc 1 162 0 448 00e6 8442 cmpr4, r0 ARM GAS /tmp/ccSGB01A.s page 12 163:main.c **** best_error = baudrate - recalcbaud; 449 .loc 1 163 0 450 00e8 8CBF itehi 451 00ea C0EB0400 rsbhir0, r0, r4 452 .LVL46: 164:main.c **** else 165:main.c **** best_error = recalcbaud -baudrate; 453 .loc 1 165 0 454 00ee C4EB0000 rsblsr0, r4, r0 455 .LVL47: 166:main.c **** 167:main.c **** best_error = best_error * 100 / baudrate; 456 .loc 1 167 0 457 00f2 6423 movsr3, #100 458 00f4 5843 mulsr0, r3, r0 459 .LVL48: 460 00f6 B0FBF4F4 udivr4, r0, r4 461 .LVL49: 168:main.c **** 169:main.c **** if (best_error < UART_ACCEPTED_BAUDRATE_ERROR) 462 .loc 1 169 0 463 00fa 022C cmpr4, #2 464 00fc 4CD8 bhi.L51 465 00fe DDF80080 ldrr8, [sp] 170:main.c **** { 171:main.c **** if (UartID == UART_1) 466 .loc 1 171 0 467 0102 012F cmpr7, #1 468 0104 4FEA0B60 lslr0, fp, #24 469 0108 5FFA8AF1 uxtbr1, r10 470 010c 4FEA0515 lslr5, r5, #4 471 .LVL50: 472 0110 08F00F09 andr9, r8, #15 473 0114 0FD1 bne.L44 172:main.c **** { 173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN; 474 .loc 1 173 0 475 0116 224C ldrr4, .L57 476 .LVL51: 174:main.c **** 175:main.c **** LPC_UART1->DLM = UART_LOAD_DLM(best_divisor); 477 .loc 1 175 0 478 0118 4FEA1A22 lsrr2, r10, #8 173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN; 479 .loc 1 173 0 480 011c 237B ldrbr3, [r4, #12]@ zero_extendqisi2 481 .loc 1 175 0 482 011e 0243 orrsr2, r2, r0 173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN; 483 .loc 1 173 0 484 0120 43F08003 orrr3, r3, #128 485 .loc 1 175 0 486 0124 D2B2 uxtbr2, r2 173:main.c **** LPC_UART1->LCR |= UART_LCR_DLAB_EN; 487 .loc 1 173 0 488 0126 2373 strbr3, [r4, #12] 489 .LVL52: ARM GAS /tmp/ccSGB01A.s page 13 490 .loc 1 175 0 491 0128 2271 strbr2, [r4, #4] 176:main.c **** 177:main.c **** LPC_UART1->DLL = UART_LOAD_DLL(best_divisor); 492 .loc 1 177 0 493 012a 2170 strbr1, [r4] 178:main.c **** 179:main.c **** /* Then reset DLAB bit */ 180:main.c **** LPC_UART1->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 494 .loc 1 180 0 495 012c 237B ldrbr3, [r4, #12]@ zero_extendqisi2 496 012e 03F07F03 andr3, r3, #127 497 0132 2373 strbr3, [r4, #12] 498 0134 10E0 b.L56 499 .LVL53: 500 .L44: 181:main.c **** 182:main.c **** LPC_UART1->FDR = (UART_FDR_MULVAL(bestm) 183:main.c **** | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; 184:main.c **** } 185:main.c **** else if (UartID == UART_4) 501 .loc 1 185 0 502 0136 042F cmpr7, #4 503 0138 13D1 bne.L45 186:main.c **** { 187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN; 504 .loc 1 187 0 505 013a 1A4C ldrr4, .L57+4 506 .LVL54: 188:main.c **** 189:main.c **** LPC_UART4->DLM = UART_LOAD_DLM(best_divisor); 507 .loc 1 189 0 508 013c 4FEA1A22 lsrr2, r10, #8 187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN; 509 .loc 1 187 0 510 0140 E368 ldrr3, [r4, #12] 511 .loc 1 189 0 512 0142 0243 orrsr2, r2, r0 187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN; 513 .loc 1 187 0 514 0144 43F08003 orrr3, r3, #128 515 .loc 1 189 0 516 0148 D2B2 uxtbr2, r2 187:main.c **** LPC_UART4->LCR |= UART_LCR_DLAB_EN; 517 .loc 1 187 0 518 014a E360 strr3, [r4, #12] 519 .loc 1 189 0 520 014c 6260 strr2, [r4, #4] 190:main.c **** 191:main.c **** LPC_UART4->DLL = UART_LOAD_DLL(best_divisor); 521 .loc 1 191 0 522 014e 2160 strr1, [r4] 192:main.c **** 193:main.c **** /* Then reset DLAB bit */ 194:main.c **** LPC_UART4->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 523 .loc 1 194 0 524 0150 E368 ldrr3, [r4, #12] ARM GAS /tmp/ccSGB01A.s page 14 525 0152 03F07F03 andr3, r3, #127 526 0156 E360 strr3, [r4, #12] 527 .L56: 195:main.c **** 196:main.c **** LPC_UART4->FDR = (UART_FDR_MULVAL(bestm) 528 .loc 1 196 0 529 0158 EDB2 uxtbr5, r5 197:main.c **** | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; 530 .loc 1 197 0 531 015a 45EA0905 orrr5, r5, r9 196:main.c **** LPC_UART4->FDR = (UART_FDR_MULVAL(bestm) 532 .loc 1 196 0 533 015e A562 strr5, [r4, #40] 534 0160 18E0 b.L55 535 .LVL55: 536 .L45: 537 0162 032F cmpr7, #3 538 0164 96BF itetls 539 0166 104B ldrlsr3, .L57+8 185:main.c **** else if (UartID == UART_4) 540 .loc 1 185 0 541 0168 0024 movhir4, #0 542 .LVL56: 543 016a 53F82740 ldrlsr4, [r3, r7, lsl #2] 544 .LVL57: 545 .LBB13: 198:main.c **** } 199:main.c **** 200:main.c **** else 201:main.c **** { 202:main.c **** LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); 203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN; 204:main.c **** 205:main.c **** UARTx->DLM = UART_LOAD_DLM(best_divisor); 546 .loc 1 205 0 547 016e 4FEA1A22 lsrr2, r10, #8 203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN; 548 .loc 1 203 0 549 0172 237B ldrbr3, [r4, #12]@ zero_extendqisi2 550 .loc 1 205 0 551 0174 0243 orrsr2, r2, r0 203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN; 552 .loc 1 203 0 553 0176 43F08003 orrr3, r3, #128 554 .loc 1 205 0 555 017a D2B2 uxtbr2, r2 203:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN; 556 .loc 1 203 0 557 017c 2373 strbr3, [r4, #12] 558 .loc 1 205 0 559 017e 2271 strbr2, [r4, #4] 206:main.c **** 207:main.c **** UARTx->DLL = UART_LOAD_DLL(best_divisor); 560 .loc 1 207 0 561 0180 2170 strbr1, [r4] 208:main.c **** 209:main.c **** /* Then reset DLAB bit */ ARM GAS /tmp/ccSGB01A.s page 15 210:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 562 .loc 1 210 0 563 0182 237B ldrbr3, [r4, #12]@ zero_extendqisi2 211:main.c **** 212:main.c **** UARTx->FDR = (UART_FDR_MULVAL(bestm) \ 564 .loc 1 212 0 565 0184 49EA0505 orrr5, r9, r5 210:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 566 .loc 1 210 0 567 0188 03F07F03 andr3, r3, #127 568 .loc 1 212 0 569 018c EDB2 uxtbr5, r5 210:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 570 .loc 1 210 0 571 018e 2373 strbr3, [r4, #12] 572 .loc 1 212 0 573 0190 84F82850 strbr5, [r4, #40] 574 .LVL58: 575 .L55: 576 .LBE13: 213:main.c **** | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; 214:main.c **** } 215:main.c **** errorStatus = SUCCESS; 577 .loc 1 215 0 578 0194 0120 movsr0, #1 579 0196 00E0 b.L41 580 .LVL59: 581 .L51: 156:main.c **** return ERROR; 582 .loc 1 156 0 583 0198 0020 movsr0, #0 584 .LVL60: 585 .L41: 216:main.c **** } 217:main.c **** 218:main.c **** return errorStatus; 219:main.c **** } 586 .loc 1 219 0 587 019a 0DB0 addsp, sp, #52 588 @ sp needed 589 019c BDE8F08F pop{r4, r5, r6, r7, r8, r9, r10, fp, pc} 590 .LVL61: 591 .L58: 592 .align2 593 .L57: 594 01a0 00000140 .word1073807360 595 01a4 00400A40 .word1074413568 596 01a8 00000000 .word.LANCHOR0 597 .cfi_endproc 598 .LFE57: 600 .section.text.startup.main,"ax",%progbits 601 .align1 602 .globalmain 603 .thumb 604 .thumb_func 606 main: 607 .LFB58: ARM GAS /tmp/ccSGB01A.s page 16 220:main.c **** 221:main.c **** 222:main.c **** 223:main.c **** 224:main.c **** int main() 225:main.c **** { 608 .loc 1 225 0 609 .cfi_startproc 610 @ args = 0, pretend = 0, frame = 8 611 @ frame_needed = 0, uses_anonymous_args = 0 612 0000 37B5 push{r0, r1, r2, r4, r5, lr} 613 .LCFI4: 614 .cfi_def_cfa_offset 24 615 .cfi_offset 0, -24 616 .cfi_offset 1, -20 617 .cfi_offset 2, -16 618 .cfi_offset 4, -12 619 .cfi_offset 5, -8 620 .cfi_offset 14, -4 226:main.c **** 227:main.c **** //Remove all interrupts 228:main.c **** NVIC_DeInit(); 621 .loc 1 228 0 622 0002 FFF7FEFF blNVIC_DeInit 623 .LVL62: 229:main.c **** 230:main.c **** GPIO_Init(); 231:main.c **** GPIO_SetDir(4, 1<<28|1<<29, GPIO_DIRECTION_OUTPUT); 232:main.c **** LPC_GPIO4->SET = 1<<28|1<<29; 624 .loc 1 232 0 625 0006 324C ldrr4, .L66 230:main.c **** GPIO_Init(); 626 .loc 1 230 0 627 0008 FFF7FEFF blGPIO_Init 628 .LVL63: 231:main.c **** GPIO_SetDir(4, 1<<28|1<<29, GPIO_DIRECTION_OUTPUT); 629 .loc 1 231 0 630 000c 0122 movsr2, #1 631 000e 0420 movsr0, #4 632 0010 4FF04051 movr1, #805306368 633 0014 FFF7FEFF blGPIO_SetDir 634 .LVL64: 635 .loc 1 232 0 636 0018 4FF04053 movr3, #805306368 637 001c A361 strr3, [r4, #24] 233:main.c **** 234:main.c **** 235:main.c **** //Start manual init of UART0 236:main.c **** uint32_t tmp; 237:main.c **** CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE); 638 .loc 1 237 0 639 001e 0820 movsr0, #8 640 0020 0121 movsr1, #1 641 0022 FFF7FEFF blCLKPWR_ConfigPPWR 642 .LVL65: 238:main.c **** LPC_UART_TypeDef* UARTx = LPC_UART0; 239:main.c **** UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS); ARM GAS /tmp/ccSGB01A.s page 17 643 .loc 1 239 0 644 0026 2B4B ldrr3, .L66+4 645 0028 0722 movsr2, #7 646 002a 1A72 strbr2, [r3, #8] 240:main.c **** UARTx->FCR = 0; 647 .loc 1 240 0 648 002c 0022 movsr2, #0 649 002e 1A72 strbr2, [r3, #8] 650 0030 2546 movr5, r4 651 .L60: 241:main.c **** while (UARTx->LSR & UART_LSR_RDR) 652 .loc 1 241 0 discriminator 1 653 0032 284B ldrr3, .L66+4 654 0034 1A7D ldrbr2, [r3, #20]@ zero_extendqisi2 655 0036 12F0010F tstr2, #1 656 003a 1A46 movr2, r3 657 003c 01D0 beq.L65 242:main.c **** { 243:main.c **** tmp = UARTx->RBR; 658 .loc 1 243 0 659 003e 1B78 ldrbr3, [r3]@ zero_extendqisi2 660 .LVL66: 661 0040 F7E7 b.L60 662 .L65: 244:main.c **** } 245:main.c **** 246:main.c **** UARTx->TER = UART_TER_TXEN; 663 .loc 1 246 0 664 0042 8023 movsr3, #128 665 0044 82F83030 strbr3, [r2, #48] 666 .L63: 247:main.c **** // Wait for current transmit complete 248:main.c **** while (!(UARTx->LSR & UART_LSR_THRE)); 667 .loc 1 248 0 discriminator 1 668 0048 117D ldrbr1, [r2, #20]@ zero_extendqisi2 669 004a 224B ldrr3, .L66+4 670 004c 8906 lslsr1, r1, #26 671 004e FBD5 bpl.L63 249:main.c **** 250:main.c **** // Disable Tx 251:main.c **** UARTx->TER = 0; 672 .loc 1 251 0 673 0050 0024 movsr4, #0 674 0052 83F83040 strbr4, [r3, #48] 252:main.c **** 253:main.c **** // Disable interrupt 254:main.c **** UARTx->IER = 0; 675 .loc 1 254 0 676 0056 5C60 strr4, [r3, #4] 255:main.c **** 256:main.c **** // Set LCR to default state 257:main.c **** UARTx->LCR = 0; 677 .loc 1 257 0 678 0058 1C73 strbr4, [r3, #12] 258:main.c **** 259:main.c **** // Set ACR to default state 260:main.c **** UARTx->ACR = 0; ARM GAS /tmp/ccSGB01A.s page 18 679 .loc 1 260 0 680 005a 1C62 strr4, [r3, #32] 261:main.c **** 262:main.c **** // Set RS485 control to default state 263:main.c **** UARTx->RS485CTRL = 0; 681 .loc 1 263 0 682 005c 83F84C40 strbr4, [r3, #76] 264:main.c **** 265:main.c **** // Set RS485 delay timer to default state 266:main.c **** UARTx->RS485DLY = 0; 683 .loc 1 266 0 684 0060 83F85440 strbr4, [r3, #84] 267:main.c **** 268:main.c **** // Set RS485 addr match to default state 269:main.c **** UARTx->ADRMATCH = 0; 685 .loc 1 269 0 686 0064 83F85040 strbr4, [r3, #80] 270:main.c **** 271:main.c **** // Dummy reading 272:main.c **** tmp = UARTx->LSR; 687 .loc 1 272 0 688 0068 1A7D ldrbr2, [r3, #20]@ zero_extendqisi2 273:main.c **** 274:main.c **** //Set divisors here- hard-coded values for 115200 275:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN; 689 .loc 1 275 0 690 006a 1A7B ldrbr2, [r3, #12]@ zero_extendqisi2 276:main.c **** UARTx->DLM = 0; 277:main.c **** UARTx->DLL = 0xd9; 278:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 279:main.c **** UARTx->FDR = 0x54; 280:main.c **** 281:main.c **** tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK; 282:main.c **** tmp |= UART_LCR_WLEN8; //8 data bits 283:main.c **** //(no parity) 284:main.c **** //(1 stop bit) 285:main.c **** UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); 286:main.c **** //End manual init of UART 0 287:main.c **** 288:main.c **** //setting these to '2' gives UART3 control of p0[2,3] 289:main.c **** PINSEL_ConfigPin(0, 2, 1); 691 .loc 1 289 0 692 006c 0221 movsr1, #2 275:main.c **** UARTx->LCR |= UART_LCR_DLAB_EN; 693 .loc 1 275 0 694 006e 42F08002 orrr2, r2, #128 695 0072 1A73 strbr2, [r3, #12] 277:main.c **** UARTx->DLL = 0xd9; 696 .loc 1 277 0 697 0074 D922 movsr2, #217 276:main.c **** UARTx->DLM = 0; 698 .loc 1 276 0 699 0076 1C71 strbr4, [r3, #4] 277:main.c **** UARTx->DLL = 0xd9; 700 .loc 1 277 0 701 0078 1A70 strbr2, [r3] 278:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; ARM GAS /tmp/ccSGB01A.s page 19 702 .loc 1 278 0 703 007a 1A7B ldrbr2, [r3, #12]@ zero_extendqisi2 704 .loc 1 289 0 705 007c 2046 movr0, r4 278:main.c **** UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; 706 .loc 1 278 0 707 007e 02F07F02 andr2, r2, #127 708 0082 1A73 strbr2, [r3, #12] 279:main.c **** UARTx->FDR = 0x54; 709 .loc 1 279 0 710 0084 5422 movsr2, #84 711 0086 83F82820 strbr2, [r3, #40] 281:main.c **** tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK; 712 .loc 1 281 0 713 008a 1A7B ldrbr2, [r3, #12]@ zero_extendqisi2 714 .LVL67: 715 008c 02F0C002 andr2, r2, #192 716 .LVL68: 282:main.c **** tmp |= UART_LCR_WLEN8; //8 data bits 717 .loc 1 282 0 718 0090 42F00302 orrr2, r2, #3 719 .LVL69: 285:main.c **** UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); 720 .loc 1 285 0 721 0094 1A73 strbr2, [r3, #12] 722 .loc 1 289 0 723 0096 0122 movsr2, #1 724 .LVL70: 725 0098 FFF7FEFF blPINSEL_ConfigPin 726 .LVL71: 290:main.c **** PINSEL_ConfigPin(0, 3, 1); 727 .loc 1 290 0 728 009c 0122 movsr2, #1 729 009e 0321 movsr1, #3 730 00a0 2046 movr0, r4 731 00a2 FFF7FEFF blPINSEL_ConfigPin 732 .LVL72: 291:main.c **** 292:main.c **** UART_FIFO_CFG_Type UARTFIFOConfigStruct; 293:main.c **** UART_FIFOConfigStructInit(&UARTFIFOConfigStruct); 733 .loc 1 293 0 734 00a6 01A8 addr0, sp, #4 735 00a8 FFF7FEFF blUART_FIFOConfigStructInit 736 .LVL73: 294:main.c **** UART_FIFOConfig(UART_0, &UARTFIFOConfigStruct); 737 .loc 1 294 0 738 00ac 2046 movr0, r4 739 00ae 01A9 addr1, sp, #4 740 00b0 FFF7FEFF blUART_FIFOConfig 741 .LVL74: 295:main.c **** UART_TxCmd(UART_0, ENABLE); 742 .loc 1 295 0 743 00b4 2046 movr0, r4 744 00b6 0121 movsr1, #1 745 00b8 FFF7FEFF blUART_TxCmd 746 .LVL75: 296:main.c **** ARM GAS /tmp/ccSGB01A.s page 20 297:main.c **** 298:main.c **** 299:main.c **** uart_set_divisors(UART_3, 115200); 747 .loc 1 299 0 748 00bc 0320 movsr0, #3 749 00be 4FF4E131 movr1, #115200 750 00c2 FFF7FEFF bluart_set_divisors 751 .LVL76: 300:main.c **** 301:main.c **** //FIXME: Remove 302:main.c **** LPC_GPIO4->CLR = 1<<29; 752 .loc 1 302 0 753 00c6 4FF00053 movr3, #536870912 754 00ca EB61 strr3, [r5, #28] 755 .L64: 756 00cc FEE7 b.L64 757 .L67: 758 00ce 00BF .align2 759 .L66: 760 00d0 80800920 .word537493632 761 00d4 00C00040 .word1073790976 762 .cfi_endproc 763 .LFE58: 765 .section.rodata.CSWTCH.6,"a",%progbits 766 .align2 767 .set.LANCHOR0,. + 0 770 CSWTCH.6: 771 0000 00C00040 .word1073790976 772 0004 00000000 .word0 773 0008 00800940 .word1074364416 774 000c 00C00940 .word1074380800 775 .section.rodata.str1.1,"aMS",%progbits,1 776 .LC0: 777 0000 62757320 .ascii"bus fault: \000" 777 6661756C 777 743A2000 778 .LC1: 779 000c 42464152 .ascii"BFAR: \000" 779 3A2000 780 .LC2: 781 0013 6D656D20 .ascii"mem fault\012\015\000" 781 6661756C 781 740A0D00 782 .LC3: 783 001f 75736720 .ascii"usg fault\012\015\000" 783 6661756C 783 740A0D00 784 .text 785 .Letext0: 786 .file 2 "/home/ghost/embedded/arm/gcc-arm-none-eabi-4_8-2014q3/lib/gcc/arm-none-eabi/4.8.4/include 787 .file 3 "./core_cm3.h" 788 .file 4 "./LPC177x_8x.h" 789 .file 5 "./Drivers/include/lpc_types.h" 790 .file 6 "./Drivers/include/lpc177x_8x_uart.h" 791 .file 7 "./Drivers/include/lpc177x_8x_clkpwr.h" 792 .file 8 "./Drivers/include/lpc177x_8x_gpio.h" ARM GAS /tmp/ccSGB01A.s page 21 DEFINED SYMBOLS *ABS*:00000000 main.c /tmp/ccSGB01A.s:19 .text.HardFault_Handler:00000000 $t /tmp/ccSGB01A.s:24 .text.HardFault_Handler:00000000 HardFault_Handler /tmp/ccSGB01A.s:229 .text.HardFault_Handler:00000108 $d /tmp/ccSGB01A.s:239 .text.uart_get_pointer:00000000 $t /tmp/ccSGB01A.s:244 .text.uart_get_pointer:00000000 uart_get_pointer /tmp/ccSGB01A.s:266 .text.uart_get_pointer:00000010 $d /tmp/ccSGB01A.s:272 .text.uart_set_divisors:00000000 $t /tmp/ccSGB01A.s:277 .text.uart_set_divisors:00000000 uart_set_divisors /tmp/ccSGB01A.s:594 .text.uart_set_divisors:000001a0 $d /tmp/ccSGB01A.s:601 .text.startup.main:00000000 $t /tmp/ccSGB01A.s:606 .text.startup.main:00000000 main /tmp/ccSGB01A.s:760 .text.startup.main:000000d0 $d /tmp/ccSGB01A.s:766 .rodata.CSWTCH.6:00000000 $d /tmp/ccSGB01A.s:770 .rodata.CSWTCH.6:00000000 CSWTCH.6 .debug_frame:00000010 $d UNDEFINED SYMBOLS UART_Send __aeabi_uldivmod CLKPWR_GetCLK NVIC_DeInit GPIO_Init GPIO_SetDir CLKPWR_ConfigPPWR PINSEL_ConfigPin UART_FIFOConfigStructInit UART_FIFOConfig UART_TxCmd |
void HardFault_Handler(void) { uint32_t reg = SCB->CFSR; uint8_t regval[12]; regval[0] = '0'; regval[1] = 'x'; regval[11] = '\r'; regval[10] = '\n'; while(1) { //Bus fault if(SCB->CFSR & SCB_CFSR_BUSFAULTSR_Msk) { uint8_t msg[] = "bus fault: "; UART_Send(UART_0, msg, 11, BLOCKING); char i; for(i = 0; i < 8; i++) { uint8_t nibble = (reg>>4*(7-i)) & 0x0f; regval[i+2] = nibble < 10 ? nibble + '0' : nibble + 'a' - 10; } UART_Send(UART_0, regval, 12, BLOCKING); //If BFAR is valid if(reg & 1<<15) { uint8_t msg[] = "BFAR: "; UART_Send(UART_0, msg, 6, BLOCKING); uint32_t bfar = SCB->BFAR; char i; for(i = 0; i < 8; i++) { uint8_t nibble = (bfar>>4*(7-i)) & 0x0f; regval[i+2] = nibble < 10 ? nibble + '0' : nibble + 'a' - 10; } UART_Send(UART_0, regval, 12, BLOCKING); } } //Memory fault else if(SCB->CFSR & SCB_CFSR_MEMFAULTSR_Msk) { uint8_t msg[] = "mem fault\n\r"; UART_Send(UART_0, msg, 11, BLOCKING); } //Usage fault else if(SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk) { uint8_t msg[] = "usg fault\n\r"; UART_Send(UART_0, msg, 11, BLOCKING); } } } |
#include "lpc177x_8x_gpio.h" #include "lpc177x_8x_timer.h" #include "lpc177x_8x_uart.h" #include "lpc177x_8x_clkpwr.h" #include "core_cm3.h" //Hard fault seems to be caused by bus fault //Just PRECISERR, none of the other bits set //Wait... BFARVALID also seems to be set void HardFault_Handler(void) { //Sqare GPS pin low -> error LPC_GPIO4->CLR = 1<<28; while(1) { } } LPC_UART_TypeDef *uart_get_pointer(UART_ID_Type UartID) { LPC_UART_TypeDef *UARTx = NULL; switch(UartID) { case UART_0: UARTx = LPC_UART0; break; case UART_2: UARTx = LPC_UART2; break; case UART_3: UARTx = LPC_UART3; break; default: break; } return UARTx; } Status uart_set_divisors(UART_ID_Type UartID, uint32_t baudrate) { Status errorStatus = ERROR; uint32_t uClk; uint32_t d, m, bestd, bestm, tmp; UNS_64 best_divisor, divisor; uint32_t current_error, best_error; uint32_t recalcbaud; /* get UART block clock */ uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER); /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers * The formula is : * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL) * It involves floating point calculations. That's the reason the formulae are adjusted with * Multiply and divide method.*/ /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions: * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */ best_error = 0xFFFFFFFF; /* Worst case */ bestd = 0; bestm = 0; best_divisor = 0; for (m = 1 ; m <= 15 ;m++) { for (d = 0 ; d < m ; d++) { divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d)); current_error = divisor & 0xFFFFFFFF; tmp = divisor>>32; /* Adjust error */ if(current_error > ((uint32_t)1<<31)) { current_error = -current_error; tmp++; } /* Out of range */ if(tmp < 1 || tmp > 65536) continue; if( current_error < best_error) { best_error = current_error; best_divisor = tmp; bestd = d; bestm = m; if(best_error == 0) break; } } /* end of inner for loop */ if (best_error == 0) break; } /* end of outer for loop */ //Code DOES get here================================= /* can not find best match */ if(best_divisor == 0) { //Code never gets here================================= return ERROR; } //Code never gets here================================= recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd)); /* reuse best_error to evaluate baud error*/ if(baudrate > recalcbaud) best_error = baudrate - recalcbaud; else best_error = recalcbaud -baudrate; best_error = best_error * 100 / baudrate; if (best_error < UART_ACCEPTED_BAUDRATE_ERROR) { if (UartID == UART_1) { LPC_UART1->LCR |= UART_LCR_DLAB_EN; LPC_UART1->DLM = UART_LOAD_DLM(best_divisor); LPC_UART1->DLL = UART_LOAD_DLL(best_divisor); /* Then reset DLAB bit */ LPC_UART1->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; LPC_UART1->FDR = (UART_FDR_MULVAL(bestm) | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; } else if (UartID == UART_4) { LPC_UART4->LCR |= UART_LCR_DLAB_EN; LPC_UART4->DLM = UART_LOAD_DLM(best_divisor); LPC_UART4->DLL = UART_LOAD_DLL(best_divisor); /* Then reset DLAB bit */ LPC_UART4->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; LPC_UART4->FDR = (UART_FDR_MULVAL(bestm) | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; } else { LPC_UART_TypeDef *UARTx = uart_get_pointer(UartID); UARTx->LCR |= UART_LCR_DLAB_EN; UARTx->DLM = UART_LOAD_DLM(best_divisor); UARTx->DLL = UART_LOAD_DLL(best_divisor); /* Then reset DLAB bit */ UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; UARTx->FDR = (UART_FDR_MULVAL(bestm) | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK; } errorStatus = SUCCESS; } return errorStatus; } int main() { GPIO_Init(); GPIO_SetDir(4, 1<<28|1<<29, GPIO_DIRECTION_OUTPUT); LPC_GPIO4->SET = 1<<28|1<<29; uart_set_divisors(UART_0, 115200); //Code never gets here================================= LPC_GPIO4->CLR = 1<<29; while(1) { } return 0; } |
.syntax unified .cpu cortex-m3 .fpu softvfp .eabi_attribute 20, 1 .eabi_attribute 21, 1 .eabi_attribute 23, 3 .eabi_attribute 24, 1 .eabi_attribute 25, 1 .eabi_attribute 26, 1 .eabi_attribute 30, 4 .eabi_attribute 34, 1 .eabi_attribute 18, 4 .thumb .file"main.c" .text .Ltext0: .cfi_sections.debug_frame .section.text.HardFault_Handler,"ax",%progbits .align1 .globalHardFault_Handler .thumb .thumb_func .typeHardFault_Handler, %function HardFault_Handler: .LFB55: .file 1 "main.c" .loc 1 11 0 .cfi_startproc @ Volatile: function does not return. @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. .loc 1 13 0 ldrr3, .L4 movr2, #268435456 strr2, [r3, #28] .L2: b.L2 .L5: .align2 .L4: .word537493632 .cfi_endproc .LFE55: .sizeHardFault_Handler, .-HardFault_Handler .section.text.uart_get_pointer,"ax",%progbits .align1 .globaluart_get_pointer .thumb .thumb_func .typeuart_get_pointer, %function uart_get_pointer: .LFB56: .loc 1 21 0 .cfi_startproc @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. .LVL0: .LVL1: cmpr0, #3 ittels ldrlsr3, .L9 ldrlsr0, [r3, r0, lsl #2] .LVL2: .loc 1 21 0 movhir0, #0 .LVL3: .loc 1 38 0 bxlr .L10: .align2 .L9: .word.LANCHOR0 .cfi_endproc .LFE56: .sizeuart_get_pointer, .-uart_get_pointer .global__aeabi_uldivmod .section.text.uart_set_divisors,"ax",%progbits .align1 .globaluart_set_divisors .thumb .thumb_func .typeuart_set_divisors, %function uart_set_divisors: .LFB57: .loc 1 42 0 .cfi_startproc @ args = 0, pretend = 0, frame = 48 @ frame_needed = 0, uses_anonymous_args = 0 .LVL4: push{r4, r5, r6, r7, r8, r9, r10, fp, lr} .LCFI0: .cfi_def_cfa_offset 36 .cfi_offset 4, -36 .cfi_offset 5, -32 .cfi_offset 6, -28 .cfi_offset 7, -24 .cfi_offset 8, -20 .cfi_offset 9, -16 .cfi_offset 10, -12 .cfi_offset 11, -8 .cfi_offset 14, -4 subsp, sp, #52 .LCFI1: .cfi_def_cfa_offset 88 .LVL5: .loc 1 42 0 movr7, r0 .loc 1 52 0 movsr0, #1 .LVL6: .loc 1 42 0 movr4, r1 .loc 1 52 0 blCLKPWR_GetCLK .LVL7: .loc 1 71 0 lsrsr1, r0, #4 lslsr2, r0, #28 strr1, [sp, #12] strr2, [sp, #8] .loc 1 52 0 movip, r0 .LVL8: .loc 1 64 0 movsr5, #0 .loc 1 71 0 ldrdr0, [sp, #8] .LVL9: strdr0, [sp, #16] .loc 1 62 0 movr1, #-1 .loc 1 71 0 strr4, [sp, #36] .loc 1 67 0 movsr6, #1 .loc 1 62 0 strr1, [sp, #32] .loc 1 65 0 movr10, #0 movfp, #0 .loc 1 63 0 strr5, [sp] .LVL10: .L12: .loc 1 42 0 discriminator 1 ldrr1, [sp, #36] movsr2, #0 strr1, [sp, #28] strr2, [sp, #24] .LVL11: .L18: .loc 1 71 0 ldrr8, [sp, #28] movr9, #0 movr2, r8 movr3, r9 ldrdr0, [sp, #16] strip, [sp, #4] bl__aeabi_uldivmod .LVL12: .loc 1 77 0 cmpr0, #-2147483648 .loc 1 74 0 movr2, r1 .loc 1 80 0 ithi addhir2, r1, #1 .loc 1 84 0 addr1, r2, #-1 .loc 1 72 0 movr3, r0 .loc 1 79 0 ithi rsbhir3, r0, #0 .LVL13: .loc 1 84 0 cmpr1, #65536 .loc 1 77 0 ldrip, [sp, #4] .LVL14: .loc 1 84 0 bcs.L14 .loc 1 87 0 ldrr0, [sp, #32] .LVL15: cmpr3, r0 bcs.L14 .LVL16: .loc 1 90 0 movr10, r2 movfp, #0 .LVL17: .loc 1 94 0 cbzr3, .L25 ldrr1, [sp, #24] strr3, [sp, #32] movr5, r6 strr1, [sp] .LVL18: .L14: .loc 1 69 0 ldrr2, [sp, #24] .LVL19: ldrr3, [sp, #28] .LVL20: addsr2, r2, #1 addr3, r3, r4 cmpr2, r6 strr2, [sp, #24] .LVL21: strr3, [sp, #28] bcc.L18 .loc 1 99 0 ldrr0, [sp, #32] cbzr0, .L17 ldrr1, [sp, #36] ldrdr2, [sp, #16] .LVL22: addr1, r1, r4 .loc 1 67 0 addsr6, r6, #1 .LVL23: strr1, [sp, #36] ldrdr0, [sp, #8] addsr2, r2, r0 adcr3, r3, r1 cmpr6, #16 strdr2, [sp, #16] bne.L12 .L17: .LVL24: .loc 1 106 0 orrsr3, r10, fp beq.L29 b.L15 .LVL25: .L25: ldrr0, [sp, #24] movr5, r6 strr0, [sp] .LVL26: .L15: .loc 1 113 0 ldrr1, [sp] lsrr3, ip, #4 addr1, r1, r5 mulr0, r3, r5 umullr2, r3, r1, r10 mlar3, r1, fp, r3 movsr1, #0 bl__aeabi_uldivmod .LVL27: .loc 1 116 0 cmpr4, r0 .loc 1 117 0 itehi rsbhir0, r0, r4 .LVL28: .loc 1 119 0 rsblsr0, r4, r0 .LVL29: .loc 1 121 0 movsr3, #100 mulsr0, r3, r0 .LVL30: udivr4, r0, r4 .LVL31: .loc 1 123 0 cmpr4, #2 bhi.L29 ldrr8, [sp] .loc 1 125 0 cmpr7, #1 lslr0, fp, #24 uxtbr1, r10 lslr5, r5, #4 .LVL32: andr9, r8, #15 bne.L22 .loc 1 127 0 ldrr4, .L35 .LVL33: .loc 1 129 0 lsrr2, r10, #8 .loc 1 127 0 ldrbr3, [r4, #12]@ zero_extendqisi2 .loc 1 129 0 orrsr2, r2, r0 .loc 1 127 0 orrr3, r3, #128 .loc 1 129 0 uxtbr2, r2 .loc 1 127 0 strbr3, [r4, #12] .LVL34: .loc 1 129 0 strbr2, [r4, #4] .loc 1 131 0 strbr1, [r4] .loc 1 134 0 ldrbr3, [r4, #12]@ zero_extendqisi2 andr3, r3, #127 strbr3, [r4, #12] b.L34 .LVL35: .L22: .loc 1 138 0 cmpr7, #4 bne.L23 .loc 1 140 0 ldrr4, .L35+4 .LVL36: .loc 1 142 0 lsrr2, r10, #8 .loc 1 140 0 ldrr3, [r4, #12] .loc 1 142 0 orrsr2, r2, r0 .loc 1 140 0 orrr3, r3, #128 .loc 1 142 0 uxtbr2, r2 .loc 1 140 0 strr3, [r4, #12] .loc 1 142 0 strr2, [r4, #4] .loc 1 144 0 strr1, [r4] .loc 1 147 0 ldrr3, [r4, #12] andr3, r3, #127 strr3, [r4, #12] .L34: .loc 1 149 0 uxtbr5, r5 orrr5, r5, r9 strr5, [r4, #40] b.L33 .LVL37: .L23: cmpr7, #3 itetls ldrlsr3, .L35+8 .loc 1 138 0 movhir4, #0 .LVL38: ldrlsr4, [r3, r7, lsl #2] .LVL39: .LBB5: .loc 1 157 0 lsrr2, r10, #8 .loc 1 155 0 ldrbr3, [r4, #12]@ zero_extendqisi2 .loc 1 157 0 orrsr2, r2, r0 .loc 1 155 0 orrr3, r3, #128 .loc 1 157 0 uxtbr2, r2 .loc 1 155 0 strbr3, [r4, #12] .loc 1 157 0 strbr2, [r4, #4] .loc 1 159 0 strbr1, [r4] .loc 1 162 0 ldrbr3, [r4, #12]@ zero_extendqisi2 .loc 1 164 0 orrr5, r9, r5 .loc 1 162 0 andr3, r3, #127 .loc 1 164 0 uxtbr5, r5 .loc 1 162 0 strbr3, [r4, #12] .loc 1 164 0 strbr5, [r4, #40] .LVL40: .L33: .LBE5: .loc 1 166 0 movsr0, #1 b.L19 .LVL41: .L29: .loc 1 109 0 movsr0, #0 .LVL42: .L19: .loc 1 170 0 addsp, sp, #52 @ sp needed pop{r4, r5, r6, r7, r8, r9, r10, fp, pc} .LVL43: .L36: .align2 .L35: .word1073807360 .word1074413568 .word.LANCHOR0 .cfi_endproc .LFE57: .sizeuart_set_divisors, .-uart_set_divisors .section.text.startup.main,"ax",%progbits .align1 .globalmain .thumb .thumb_func .typemain, %function main: .LFB58: .loc 1 174 0 .cfi_startproc @ Volatile: function does not return. @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push{r3, lr} .LCFI2: .cfi_def_cfa_offset 8 .cfi_offset 3, -8 .cfi_offset 14, -4 .loc 1 175 0 blGPIO_Init .LVL44: .loc 1 177 0 ldrr4, .L39 .loc 1 176 0 movsr0, #4 movr1, #805306368 movsr2, #1 blGPIO_SetDir .LVL45: .loc 1 177 0 movr3, #805306368 strr3, [r4, #24] .loc 1 179 0 movsr0, #0 movr1, #115200 bluart_set_divisors .LVL46: .loc 1 182 0 movr3, #536870912 strr3, [r4, #28] .L38: b.L38 .L40: .align2 .L39: .word537493632 .cfi_endproc .LFE58: .sizemain, .-main .section.rodata.CSWTCH.2,"a",%progbits .align2 .set.LANCHOR0,. + 0 .typeCSWTCH.2, %object .sizeCSWTCH.2, 16 CSWTCH.2: .word1073790976 .word0 .word1074364416 .word1074380800 .text .Letext0: .file 2 "/home/ghost/embedded/arm/gcc-arm-none-eabi-4_8-2014q3/lib/gcc/arm-none-eabi/4.8.4/include/stdint-gcc.h" .file 3 "./LPC177x_8x.h" .file 4 "./Drivers/include/lpc_types.h" .file 5 "./Drivers/include/lpc177x_8x_uart.h" .file 6 "./Drivers/include/lpc177x_8x_clkpwr.h" .file 7 "./core_cm3.h" .file 8 "./Drivers/include/lpc177x_8x_gpio.h" .section.debug_info,"",%progbits .Ldebug_info0: .4byte0x946 .2byte0x2 .4byte.Ldebug_abbrev0 .byte0x4 .uleb128 0x1 .4byte.LASF61 .byte0x1 .4byte.LASF62 .4byte.LASF63 .4byte.Ldebug_ranges0+0 .4byte0 .4byte0 .4byte.Ldebug_line0 .uleb128 0x2 .byte0x4 .byte0x7 .4byte.LASF0 .uleb128 0x2 .byte0x1 .byte0x6 .4byte.LASF1 .uleb128 0x2 .byte0x2 .byte0x5 .4byte.LASF2 .uleb128 0x3 .4byte.LASF5 .byte0x2 .byte0x28 .4byte0x49 .uleb128 0x2 .byte0x4 .byte0x5 .4byte.LASF3 .uleb128 0x2 .byte0x8 .byte0x5 .4byte.LASF4 .uleb128 0x3 .4byte.LASF6 .byte0x2 .byte0x2e .4byte0x62 .uleb128 0x2 .byte0x1 .byte0x8 .4byte.LASF7 .uleb128 0x2 .byte0x2 .byte0x7 .4byte.LASF8 .uleb128 0x3 .4byte.LASF9 .byte0x2 .byte0x34 .4byte0x7b .uleb128 0x2 .byte0x4 .byte0x7 .4byte.LASF10 .uleb128 0x3 .4byte.LASF11 .byte0x2 .byte0x37 .4byte0x8d .uleb128 0x2 .byte0x8 .byte0x7 .4byte.LASF12 .uleb128 0x4 .byte0x4 .byte0x5 .ascii"int\000" .uleb128 0x2 .byte0x4 .byte0x7 .4byte.LASF13 .uleb128 0x5 .4byte0x70 .uleb128 0x6 .4byte0xa2 .uleb128 0x5 .4byte0x57 .uleb128 0x7 .byte0x20 .byte0x3 .2byte0x177 .4byte0x115 .uleb128 0x8 .ascii"DIR\000" .byte0x3 .2byte0x179 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0 .uleb128 0x9 .4byte.LASF14 .byte0x3 .2byte0x17a .4byte0x115 .byte0x2 .byte0x23 .uleb128 0x4 .uleb128 0x9 .4byte.LASF15 .byte0x3 .2byte0x17b .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x10 .uleb128 0x8 .ascii"PIN\000" .byte0x3 .2byte0x17c .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x14 .uleb128 0x8 .ascii"SET\000" .byte0x3 .2byte0x17d .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x18 .uleb128 0x8 .ascii"CLR\000" .byte0x3 .2byte0x17e .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x1c .byte0 .uleb128 0xa .4byte0x70 .4byte0x125 .uleb128 0xb .4byte0x9b .byte0x2 .byte0 .uleb128 0xc .4byte.LASF16 .byte0x3 .2byte0x17f .4byte0xb1 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x1f2 .4byte0x16b .uleb128 0xe .ascii"RBR\000" .byte0x3 .2byte0x1f4 .4byte0x16b .uleb128 0xe .ascii"THR\000" .byte0x3 .2byte0x1f5 .4byte0xac .uleb128 0xe .ascii"DLL\000" .byte0x3 .2byte0x1f6 .4byte0xac .uleb128 0xf .4byte.LASF14 .byte0x3 .2byte0x1f7 .4byte0x70 .byte0 .uleb128 0x6 .4byte0xac .uleb128 0xd .byte0x4 .byte0x3 .2byte0x1f9 .4byte0x192 .uleb128 0xe .ascii"DLM\000" .byte0x3 .2byte0x1fb .4byte0xac .uleb128 0xe .ascii"IER\000" .byte0x3 .2byte0x1fc .4byte0xa2 .byte0 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x1fe .4byte0x1b4 .uleb128 0xe .ascii"IIR\000" .byte0x3 .2byte0x200 .4byte0xa7 .uleb128 0xe .ascii"FCR\000" .byte0x3 .2byte0x201 .4byte0xac .byte0 .uleb128 0x7 .byte0x58 .byte0x3 .2byte0x1f0 .4byte0x2e4 .uleb128 0x10 .4byte0x131 .byte0x2 .byte0x23 .uleb128 0 .uleb128 0x10 .4byte0x170 .byte0x2 .byte0x23 .uleb128 0x4 .uleb128 0x10 .4byte0x192 .byte0x2 .byte0x23 .uleb128 0x8 .uleb128 0x8 .ascii"LCR\000" .byte0x3 .2byte0x203 .4byte0xac .byte0x2 .byte0x23 .uleb128 0xc .uleb128 0x9 .4byte.LASF17 .byte0x3 .2byte0x204 .4byte0x2e4 .byte0x2 .byte0x23 .uleb128 0xd .uleb128 0x8 .ascii"LSR\000" .byte0x3 .2byte0x205 .4byte0x16b .byte0x2 .byte0x23 .uleb128 0x14 .uleb128 0x9 .4byte.LASF18 .byte0x3 .2byte0x206 .4byte0x2e4 .byte0x2 .byte0x23 .uleb128 0x15 .uleb128 0x8 .ascii"SCR\000" .byte0x3 .2byte0x207 .4byte0xac .byte0x2 .byte0x23 .uleb128 0x1c .uleb128 0x9 .4byte.LASF19 .byte0x3 .2byte0x208 .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x1d .uleb128 0x8 .ascii"ACR\000" .byte0x3 .2byte0x209 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x20 .uleb128 0x9 .4byte.LASF20 .byte0x3 .2byte0x20a .4byte0x304 .byte0x2 .byte0x23 .uleb128 0x24 .uleb128 0x8 .ascii"FDR\000" .byte0x3 .2byte0x20b .4byte0xac .byte0x2 .byte0x23 .uleb128 0x28 .uleb128 0x9 .4byte.LASF21 .byte0x3 .2byte0x20c .4byte0x2e4 .byte0x2 .byte0x23 .uleb128 0x29 .uleb128 0x8 .ascii"TER\000" .byte0x3 .2byte0x20d .4byte0xac .byte0x2 .byte0x23 .uleb128 0x30 .uleb128 0x9 .4byte.LASF22 .byte0x3 .2byte0x20e .4byte0x314 .byte0x2 .byte0x23 .uleb128 0x31 .uleb128 0x9 .4byte.LASF23 .byte0x3 .2byte0x20f .4byte0xac .byte0x2 .byte0x23 .uleb128 0x4c .uleb128 0x9 .4byte.LASF24 .byte0x3 .2byte0x210 .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x4d .uleb128 0x9 .4byte.LASF25 .byte0x3 .2byte0x211 .4byte0xac .byte0x2 .byte0x23 .uleb128 0x50 .uleb128 0x9 .4byte.LASF26 .byte0x3 .2byte0x212 .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x51 .uleb128 0x9 .4byte.LASF27 .byte0x3 .2byte0x213 .4byte0xac .byte0x2 .byte0x23 .uleb128 0x54 .uleb128 0x9 .4byte.LASF28 .byte0x3 .2byte0x214 .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x55 .byte0 .uleb128 0xa .4byte0x57 .4byte0x2f4 .uleb128 0xb .4byte0x9b .byte0x6 .byte0 .uleb128 0xa .4byte0x57 .4byte0x304 .uleb128 0xb .4byte0x9b .byte0x2 .byte0 .uleb128 0xa .4byte0x57 .4byte0x314 .uleb128 0xb .4byte0x9b .byte0x3 .byte0 .uleb128 0xa .4byte0x57 .4byte0x324 .uleb128 0xb .4byte0x9b .byte0x1a .byte0 .uleb128 0xc .4byte.LASF29 .byte0x3 .2byte0x215 .4byte0x1b4 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x21b .4byte0x36a .uleb128 0xe .ascii"RBR\000" .byte0x3 .2byte0x21c .4byte0x16b .uleb128 0xe .ascii"THR\000" .byte0x3 .2byte0x21d .4byte0xac .uleb128 0xe .ascii"DLL\000" .byte0x3 .2byte0x21e .4byte0xac .uleb128 0xf .4byte.LASF14 .byte0x3 .2byte0x21f .4byte0x70 .byte0 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x221 .4byte0x38c .uleb128 0xe .ascii"DLM\000" .byte0x3 .2byte0x222 .4byte0xac .uleb128 0xe .ascii"IER\000" .byte0x3 .2byte0x223 .4byte0xa2 .byte0 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x225 .4byte0x3ae .uleb128 0xe .ascii"IIR\000" .byte0x3 .2byte0x226 .4byte0xa7 .uleb128 0xe .ascii"FCR\000" .byte0x3 .2byte0x227 .4byte0xac .byte0 .uleb128 0x7 .byte0x58 .byte0x3 .2byte0x219 .4byte0x51a .uleb128 0x10 .4byte0x330 .byte0x2 .byte0x23 .uleb128 0 .uleb128 0x10 .4byte0x36a .byte0x2 .byte0x23 .uleb128 0x4 .uleb128 0x10 .4byte0x38c .byte0x2 .byte0x23 .uleb128 0x8 .uleb128 0x8 .ascii"LCR\000" .byte0x3 .2byte0x229 .4byte0xac .byte0x2 .byte0x23 .uleb128 0xc .uleb128 0x9 .4byte.LASF17 .byte0x3 .2byte0x22a .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0xd .uleb128 0x8 .ascii"MCR\000" .byte0x3 .2byte0x22b .4byte0xac .byte0x2 .byte0x23 .uleb128 0x10 .uleb128 0x9 .4byte.LASF18 .byte0x3 .2byte0x22c .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x11 .uleb128 0x8 .ascii"LSR\000" .byte0x3 .2byte0x22d .4byte0x16b .byte0x2 .byte0x23 .uleb128 0x14 .uleb128 0x9 .4byte.LASF19 .byte0x3 .2byte0x22e .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x15 .uleb128 0x8 .ascii"MSR\000" .byte0x3 .2byte0x22f .4byte0x16b .byte0x2 .byte0x23 .uleb128 0x18 .uleb128 0x9 .4byte.LASF20 .byte0x3 .2byte0x230 .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x19 .uleb128 0x8 .ascii"SCR\000" .byte0x3 .2byte0x231 .4byte0xac .byte0x2 .byte0x23 .uleb128 0x1c .uleb128 0x9 .4byte.LASF21 .byte0x3 .2byte0x232 .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x1d .uleb128 0x8 .ascii"ACR\000" .byte0x3 .2byte0x233 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x20 .uleb128 0x9 .4byte.LASF30 .byte0x3 .2byte0x234 .4byte0x70 .byte0x2 .byte0x23 .uleb128 0x24 .uleb128 0x8 .ascii"FDR\000" .byte0x3 .2byte0x235 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x28 .uleb128 0x9 .4byte.LASF31 .byte0x3 .2byte0x236 .4byte0x70 .byte0x2 .byte0x23 .uleb128 0x2c .uleb128 0x8 .ascii"TER\000" .byte0x3 .2byte0x237 .4byte0xac .byte0x2 .byte0x23 .uleb128 0x30 .uleb128 0x9 .4byte.LASF22 .byte0x3 .2byte0x238 .4byte0x314 .byte0x2 .byte0x23 .uleb128 0x31 .uleb128 0x9 .4byte.LASF23 .byte0x3 .2byte0x239 .4byte0xac .byte0x2 .byte0x23 .uleb128 0x4c .uleb128 0x9 .4byte.LASF24 .byte0x3 .2byte0x23a .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x4d .uleb128 0x9 .4byte.LASF25 .byte0x3 .2byte0x23b .4byte0xac .byte0x2 .byte0x23 .uleb128 0x50 .uleb128 0x9 .4byte.LASF26 .byte0x3 .2byte0x23c .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x51 .uleb128 0x9 .4byte.LASF27 .byte0x3 .2byte0x23d .4byte0xac .byte0x2 .byte0x23 .uleb128 0x54 .uleb128 0x9 .4byte.LASF28 .byte0x3 .2byte0x23e .4byte0x2f4 .byte0x2 .byte0x23 .uleb128 0x55 .byte0 .uleb128 0xc .4byte.LASF32 .byte0x3 .2byte0x23f .4byte0x3ae .uleb128 0xd .byte0x4 .byte0x3 .2byte0x244 .4byte0x554 .uleb128 0xe .ascii"RBR\000" .byte0x3 .2byte0x245 .4byte0xa7 .uleb128 0xe .ascii"THR\000" .byte0x3 .2byte0x246 .4byte0xa2 .uleb128 0xe .ascii"DLL\000" .byte0x3 .2byte0x247 .4byte0xa2 .byte0 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x249 .4byte0x576 .uleb128 0xe .ascii"DLM\000" .byte0x3 .2byte0x24a .4byte0xa2 .uleb128 0xe .ascii"IER\000" .byte0x3 .2byte0x24b .4byte0xa2 .byte0 .uleb128 0xd .byte0x4 .byte0x3 .2byte0x24d .4byte0x598 .uleb128 0xe .ascii"IIR\000" .byte0x3 .2byte0x24e .4byte0xa7 .uleb128 0xe .ascii"FCR\000" .byte0x3 .2byte0x24f .4byte0xa2 .byte0 .uleb128 0x7 .byte0x5c .byte0x3 .2byte0x242 .4byte0x69b .uleb128 0x10 .4byte0x526 .byte0x2 .byte0x23 .uleb128 0 .uleb128 0x10 .4byte0x554 .byte0x2 .byte0x23 .uleb128 0x4 .uleb128 0x10 .4byte0x576 .byte0x2 .byte0x23 .uleb128 0x8 .uleb128 0x8 .ascii"LCR\000" .byte0x3 .2byte0x251 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0xc .uleb128 0x9 .4byte.LASF14 .byte0x3 .2byte0x252 .4byte0x70 .byte0x2 .byte0x23 .uleb128 0x10 .uleb128 0x8 .ascii"LSR\000" .byte0x3 .2byte0x253 .4byte0xa7 .byte0x2 .byte0x23 .uleb128 0x14 .uleb128 0x9 .4byte.LASF17 .byte0x3 .2byte0x254 .4byte0x70 .byte0x2 .byte0x23 .uleb128 0x18 .uleb128 0x8 .ascii"SCR\000" .byte0x3 .2byte0x255 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x1c .uleb128 0x8 .ascii"ACR\000" .byte0x3 .2byte0x256 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x20 .uleb128 0x8 .ascii"ICR\000" .byte0x3 .2byte0x257 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x24 .uleb128 0x8 .ascii"FDR\000" .byte0x3 .2byte0x258 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x28 .uleb128 0x8 .ascii"OSR\000" .byte0x3 .2byte0x259 .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x2c .uleb128 0x9 .4byte.LASF18 .byte0x3 .2byte0x25a .4byte0x69b .byte0x2 .byte0x23 .uleb128 0x30 .uleb128 0x9 .4byte.LASF33 .byte0x3 .2byte0x25b .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x48 .uleb128 0x9 .4byte.LASF23 .byte0x3 .2byte0x25c .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x4c .uleb128 0x9 .4byte.LASF25 .byte0x3 .2byte0x25d .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x50 .uleb128 0x9 .4byte.LASF27 .byte0x3 .2byte0x25e .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x54 .uleb128 0x9 .4byte.LASF34 .byte0x3 .2byte0x25f .4byte0xa2 .byte0x2 .byte0x23 .uleb128 0x58 .byte0 .uleb128 0xa .4byte0x70 .4byte0x6ab .uleb128 0xb .4byte0x9b .byte0x5 .byte0 .uleb128 0xc .4byte.LASF35 .byte0x3 .2byte0x260 .4byte0x598 .uleb128 0x11 .byte0x1 .byte0x4 .byte0x48 .4byte0x6cc .uleb128 0x12 .4byte.LASF36 .sleb128 0 .uleb128 0x12 .4byte.LASF37 .sleb128 1 .byte0 .uleb128 0x3 .4byte.LASF38 .byte0x4 .byte0x48 .4byte0x6b7 .uleb128 0x2 .byte0x1 .byte0x8 .4byte.LASF39 .uleb128 0x3 .4byte.LASF40 .byte0x4 .byte0xbd .4byte0x82 .uleb128 0x13 .byte0x1 .byte0x5 .2byte0x173 .4byte0x711 .uleb128 0x12 .4byte.LASF41 .sleb128 0 .uleb128 0x12 .4byte.LASF42 .sleb128 1 .uleb128 0x12 .4byte.LASF43 .sleb128 2 .uleb128 0x12 .4byte.LASF44 .sleb128 3 .uleb128 0x12 .4byte.LASF45 .sleb128 4 .byte0 .uleb128 0xc .4byte.LASF46 .byte0x5 .2byte0x179 .4byte0x6e9 .uleb128 0x14 .byte0x1 .4byte.LASF59 .byte0x1 .byte0x14 .byte0x1 .4byte0x746 .byte0x1 .4byte0x746 .uleb128 0x15 .4byte.LASF47 .byte0x1 .byte0x14 .4byte0x711 .uleb128 0x16 .4byte.LASF58 .byte0x1 .byte0x16 .4byte0x746 .byte0 .uleb128 0x17 .byte0x4 .4byte0x324 .uleb128 0x18 .byte0x1 .4byte.LASF64 .byte0x1 .byte0xa .byte0x1 .4byte.LFB55 .4byte.LFE55 .byte0x2 .byte0x7d .sleb128 0 .byte0x1 .uleb128 0x19 .4byte0x71d .4byte.LFB56 .4byte.LFE56 .byte0x2 .byte0x7d .sleb128 0 .byte0x1 .4byte0x789 .uleb128 0x1a .4byte0x72f .4byte.LLST0 .uleb128 0x1b .4byte0x73a .4byte.LLST1 .byte0 .uleb128 0x1c .byte0x1 .4byte.LASF65 .byte0x1 .byte0x29 .byte0x1 .4byte0x6cc .4byte.LFB57 .4byte.LFE57 .4byte.LLST2 .byte0x1 .4byte0x89d .uleb128 0x1d .4byte.LASF47 .byte0x1 .byte0x29 .4byte0x711 .4byte.LLST3 .uleb128 0x1d .4byte.LASF48 .byte0x1 .byte0x29 .4byte0x70 .4byte.LLST4 .uleb128 0x1e .4byte.LASF49 .byte0x1 .byte0x2b .4byte0x6cc .byte0 .uleb128 0x1f .4byte.LASF50 .byte0x1 .byte0x2d .4byte0x70 .4byte.LLST5 .uleb128 0x20 .ascii"d\000" .byte0x1 .byte0x2e .4byte0x70 .4byte.LLST6 .uleb128 0x20 .ascii"m\000" .byte0x1 .byte0x2e .4byte0x70 .4byte.LLST7 .uleb128 0x1f .4byte.LASF51 .byte0x1 .byte0x2e .4byte0x70 .4byte.LLST8 .uleb128 0x1f .4byte.LASF52 .byte0x1 .byte0x2e .4byte0x70 .4byte.LLST9 .uleb128 0x20 .ascii"tmp\000" .byte0x1 .byte0x2e .4byte0x70 .4byte.LLST10 .uleb128 0x1f .4byte.LASF53 .byte0x1 .byte0x2f .4byte0x6de .4byte.LLST11 .uleb128 0x1f .4byte.LASF54 .byte0x1 .byte0x2f .4byte0x6de .4byte.LLST12 .uleb128 0x1f .4byte.LASF55 .byte0x1 .byte0x30 .4byte0x70 .4byte.LLST13 .uleb128 0x1f .4byte.LASF56 .byte0x1 .byte0x30 .4byte0x70 .4byte.LLST14 .uleb128 0x1f .4byte.LASF57 .byte0x1 .byte0x31 .4byte0x70 .4byte.LLST15 .uleb128 0x21 .4byte.LBB5 .4byte.LBE5 .4byte0x88d .uleb128 0x22 .4byte.LASF58 .byte0x1 .byte0x9a .4byte0x746 .byte0x1 .byte0x54 .byte0 .uleb128 0x23 .4byte.LVL7 .4byte0x90d .uleb128 0x24 .byte0x1 .byte0x50 .byte0x1 .byte0x31 .byte0 .byte0 .uleb128 0x25 .byte0x1 .4byte.LASF66 .byte0x1 .byte0xad .4byte0x94 .4byte.LFB58 .4byte.LFE58 .4byte.LLST16 .byte0x1 .4byte0x8fa .uleb128 0x26 .4byte.LVL44 .4byte0x925 .uleb128 0x27 .4byte.LVL45 .4byte0x92f .4byte0x8e2 .uleb128 0x24 .byte0x1 .byte0x52 .byte0x1 .byte0x31 .uleb128 0x24 .byte0x1 .byte0x51 .byte0x3 .byte0x48 .byte0x49 .byte0x24 .uleb128 0x24 .byte0x1 .byte0x50 .byte0x1 .byte0x34 .byte0 .uleb128 0x23 .4byte.LVL46 .4byte0x789 .uleb128 0x24 .byte0x1 .byte0x51 .byte0x4 .byte0x8 .byte0xe1 .byte0x39 .byte0x24 .uleb128 0x24 .byte0x1 .byte0x50 .byte0x1 .byte0x30 .byte0 .byte0 .uleb128 0x28 .4byte.LASF67 .byte0x7 .2byte0x490 .4byte0x908 .byte0x1 .byte0x1 .uleb128 0x5 .4byte0x3e .uleb128 0x29 .byte0x1 .4byte.LASF60 .byte0x6 .byte0xe1 .byte0x1 .4byte0x70 .byte0x1 .4byte0x925 .uleb128 0x2a .4byte0x57 .byte0 .uleb128 0x2b .byte0x1 .4byte.LASF68 .byte0x8 .byte0x8a .byte0x1 .byte0x1 .uleb128 0x2c .byte0x1 .4byte.LASF69 .byte0x8 .byte0x8c .byte0x1 .byte0x1 .uleb128 0x2a .4byte0x57 .uleb128 0x2a .4byte0x70 .uleb128 0x2a .4byte0x57 .byte0 .byte0 .section.debug_abbrev,"",%progbits .Ldebug_abbrev0: .uleb128 0x1 .uleb128 0x11 .byte0x1 .uleb128 0x25 .uleb128 0xe .uleb128 0x13 .uleb128 0xb .uleb128 0x3 .uleb128 0xe .uleb128 0x1b .uleb128 0xe .uleb128 0x55 .uleb128 0x6 .uleb128 0x11 .uleb128 0x1 .uleb128 0x52 .uleb128 0x1 .uleb128 0x10 .uleb128 0x6 .byte0 .byte0 .uleb128 0x2 .uleb128 0x24 .byte0 .uleb128 0xb .uleb128 0xb .uleb128 0x3e .uleb128 0xb .uleb128 0x3 .uleb128 0xe .byte0 .byte0 .uleb128 0x3 .uleb128 0x16 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x4 .uleb128 0x24 .byte0 .uleb128 0xb .uleb128 0xb .uleb128 0x3e .uleb128 0xb .uleb128 0x3 .uleb128 0x8 .byte0 .byte0 .uleb128 0x5 .uleb128 0x35 .byte0 .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x6 .uleb128 0x26 .byte0 .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x7 .uleb128 0x13 .byte0x1 .uleb128 0xb .uleb128 0xb .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x8 .uleb128 0xd .byte0 .uleb128 0x3 .uleb128 0x8 .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x49 .uleb128 0x13 .uleb128 0x38 .uleb128 0xa .byte0 .byte0 .uleb128 0x9 .uleb128 0xd .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x49 .uleb128 0x13 .uleb128 0x38 .uleb128 0xa .byte0 .byte0 .uleb128 0xa .uleb128 0x1 .byte0x1 .uleb128 0x49 .uleb128 0x13 .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0xb .uleb128 0x21 .byte0 .uleb128 0x49 .uleb128 0x13 .uleb128 0x2f .uleb128 0xb .byte0 .byte0 .uleb128 0xc .uleb128 0x16 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0xd .uleb128 0x17 .byte0x1 .uleb128 0xb .uleb128 0xb .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0xe .uleb128 0xd .byte0 .uleb128 0x3 .uleb128 0x8 .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0xf .uleb128 0xd .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x10 .uleb128 0xd .byte0 .uleb128 0x49 .uleb128 0x13 .uleb128 0x38 .uleb128 0xa .byte0 .byte0 .uleb128 0x11 .uleb128 0x4 .byte0x1 .uleb128 0xb .uleb128 0xb .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x12 .uleb128 0x28 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x1c .uleb128 0xd .byte0 .byte0 .uleb128 0x13 .uleb128 0x4 .byte0x1 .uleb128 0xb .uleb128 0xb .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x14 .uleb128 0x2e .byte0x1 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x27 .uleb128 0xc .uleb128 0x49 .uleb128 0x13 .uleb128 0x20 .uleb128 0xb .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x15 .uleb128 0x5 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x16 .uleb128 0x34 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x17 .uleb128 0xf .byte0 .uleb128 0xb .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x18 .uleb128 0x2e .byte0 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x27 .uleb128 0xc .uleb128 0x11 .uleb128 0x1 .uleb128 0x12 .uleb128 0x1 .uleb128 0x40 .uleb128 0xa .uleb128 0x2117 .uleb128 0xc .byte0 .byte0 .uleb128 0x19 .uleb128 0x2e .byte0x1 .uleb128 0x31 .uleb128 0x13 .uleb128 0x11 .uleb128 0x1 .uleb128 0x12 .uleb128 0x1 .uleb128 0x40 .uleb128 0xa .uleb128 0x2117 .uleb128 0xc .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x1a .uleb128 0x5 .byte0 .uleb128 0x31 .uleb128 0x13 .uleb128 0x2 .uleb128 0x6 .byte0 .byte0 .uleb128 0x1b .uleb128 0x34 .byte0 .uleb128 0x31 .uleb128 0x13 .uleb128 0x2 .uleb128 0x6 .byte0 .byte0 .uleb128 0x1c .uleb128 0x2e .byte0x1 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x27 .uleb128 0xc .uleb128 0x49 .uleb128 0x13 .uleb128 0x11 .uleb128 0x1 .uleb128 0x12 .uleb128 0x1 .uleb128 0x40 .uleb128 0x6 .uleb128 0x2116 .uleb128 0xc .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x1d .uleb128 0x5 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .uleb128 0x2 .uleb128 0x6 .byte0 .byte0 .uleb128 0x1e .uleb128 0x34 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .uleb128 0x1c .uleb128 0xb .byte0 .byte0 .uleb128 0x1f .uleb128 0x34 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .uleb128 0x2 .uleb128 0x6 .byte0 .byte0 .uleb128 0x20 .uleb128 0x34 .byte0 .uleb128 0x3 .uleb128 0x8 .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .uleb128 0x2 .uleb128 0x6 .byte0 .byte0 .uleb128 0x21 .uleb128 0xb .byte0x1 .uleb128 0x11 .uleb128 0x1 .uleb128 0x12 .uleb128 0x1 .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x22 .uleb128 0x34 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .uleb128 0x2 .uleb128 0xa .byte0 .byte0 .uleb128 0x23 .uleb128 0x4109 .byte0x1 .uleb128 0x11 .uleb128 0x1 .uleb128 0x31 .uleb128 0x13 .byte0 .byte0 .uleb128 0x24 .uleb128 0x410a .byte0 .uleb128 0x2 .uleb128 0xa .uleb128 0x2111 .uleb128 0xa .byte0 .byte0 .uleb128 0x25 .uleb128 0x2e .byte0x1 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x49 .uleb128 0x13 .uleb128 0x11 .uleb128 0x1 .uleb128 0x12 .uleb128 0x1 .uleb128 0x40 .uleb128 0x6 .uleb128 0x2117 .uleb128 0xc .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x26 .uleb128 0x4109 .byte0 .uleb128 0x11 .uleb128 0x1 .uleb128 0x31 .uleb128 0x13 .byte0 .byte0 .uleb128 0x27 .uleb128 0x4109 .byte0x1 .uleb128 0x11 .uleb128 0x1 .uleb128 0x31 .uleb128 0x13 .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x28 .uleb128 0x34 .byte0 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0x5 .uleb128 0x49 .uleb128 0x13 .uleb128 0x3f .uleb128 0xc .uleb128 0x3c .uleb128 0xc .byte0 .byte0 .uleb128 0x29 .uleb128 0x2e .byte0x1 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x27 .uleb128 0xc .uleb128 0x49 .uleb128 0x13 .uleb128 0x3c .uleb128 0xc .uleb128 0x1 .uleb128 0x13 .byte0 .byte0 .uleb128 0x2a .uleb128 0x5 .byte0 .uleb128 0x49 .uleb128 0x13 .byte0 .byte0 .uleb128 0x2b .uleb128 0x2e .byte0 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x27 .uleb128 0xc .uleb128 0x3c .uleb128 0xc .byte0 .byte0 .uleb128 0x2c .uleb128 0x2e .byte0x1 .uleb128 0x3f .uleb128 0xc .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x27 .uleb128 0xc .uleb128 0x3c .uleb128 0xc .byte0 .byte0 .byte0 .section.debug_loc,"",%progbits .Ldebug_loc0: .LLST0: .4byte.LVL0 .4byte.LVL2 .2byte0x1 .byte0x50 .4byte.LVL2 .4byte.LFE56 .2byte0x4 .byte0xf3 .uleb128 0x1 .byte0x50 .byte0x9f .4byte0 .4byte0 .LLST1: .4byte.LVL1 .4byte.LVL3 .2byte0x2 .byte0x30 .byte0x9f .4byte.LVL3 .4byte.LFE56 .2byte0x1 .byte0x50 .4byte0 .4byte0 .LLST2: .4byte.LFB57 .4byte.LCFI0 .2byte0x2 .byte0x7d .sleb128 0 .4byte.LCFI0 .4byte.LCFI1 .2byte0x2 .byte0x7d .sleb128 36 .4byte.LCFI1 .4byte.LFE57 .2byte0x3 .byte0x7d .sleb128 88 .4byte0 .4byte0 .LLST3: .4byte.LVL4 .4byte.LVL6 .2byte0x1 .byte0x50 .4byte.LVL6 .4byte.LFE57 .2byte0x4 .byte0xf3 .uleb128 0x1 .byte0x50 .byte0x9f .4byte0 .4byte0 .LLST4: .4byte.LVL4 .4byte.LVL7-1 .2byte0x1 .byte0x51 .4byte.LVL7-1 .4byte.LVL31 .2byte0x1 .byte0x54 .4byte.LVL31 .4byte.LFE57 .2byte0x4 .byte0xf3 .uleb128 0x1 .byte0x51 .byte0x9f .4byte0 .4byte0 .LLST5: .4byte.LVL8 .4byte.LVL9 .2byte0x1 .byte0x50 .4byte.LVL9 .4byte.LVL12-1 .2byte0x1 .byte0x5c .4byte.LVL14 .4byte.LVL27-1 .2byte0x1 .byte0x5c .4byte0 .4byte0 .LLST6: .4byte.LVL10 .4byte.LVL11 .2byte0x2 .byte0x30 .byte0x9f .4byte.LVL11 .4byte.LVL21 .2byte0x2 .byte0x91 .sleb128 -64 .4byte.LVL21 .4byte.LVL22 .2byte0x1 .byte0x52 .4byte.LVL22 .4byte.LVL43 .2byte0x2 .byte0x91 .sleb128 -64 .4byte.LVL43 .4byte.LFE57 .2byte0x2 .byte0x7d .sleb128 -64 .4byte0 .4byte0 .LLST7: .4byte.LVL8 .4byte.LVL10 .2byte0x2 .byte0x31 .byte0x9f .4byte.LVL10 .4byte.LVL43 .2byte0x1 .byte0x56 .4byte0 .4byte0 .LLST8: .4byte.LVL8 .4byte.LVL10 .2byte0x2 .byte0x30 .byte0x9f .4byte.LVL17 .4byte.LVL18 .2byte0x2 .byte0x91 .sleb128 -64 .4byte.LVL24 .4byte.LVL25 .2byte0x2 .byte0x7d .sleb128 0 .4byte.LVL25 .4byte.LVL26 .2byte0x2 .byte0x91 .sleb128 -64 .4byte.LVL26 .4byte.LVL34 .2byte0x2 .byte0x7d .sleb128 0 .4byte.LVL34 .4byte.LVL41 .2byte0x1 .byte0x58 .4byte.LVL41 .4byte.LVL42 .2byte0x2 .byte0x7d .sleb128 0 .4byte0 .4byte0 .LLST9: .4byte.LVL8 .4byte.LVL10 .2byte0x2 .byte0x30 .byte0x9f .4byte.LVL24 .4byte.LVL25 .2byte0x1 .byte0x55 .4byte.LVL26 .4byte.LVL32 .2byte0x1 .byte0x55 .4byte.LVL41 .4byte.LVL42 .2byte0x1 .byte0x55 .4byte0 .4byte0 .LLST10: .4byte.LVL13 .4byte.LVL19 .2byte0x1 .byte0x52 .4byte.LVL25 .4byte.LVL26 .2byte0x1 .byte0x52 .4byte0 .4byte0 .LLST11: .4byte.LVL8 .4byte.LVL10 .2byte0xa .byte0x9e .uleb128 0x8 .8byte0 .4byte.LVL17 .4byte.LVL18 .2byte0x6 .byte0x5a .byte0x93 .uleb128 0x4 .byte0x5b .byte0x93 .uleb128 0x4 .4byte.LVL24 .4byte.LVL43 .2byte0x6 .byte0x5a .byte0x93 .uleb128 0x4 .byte0x5b .byte0x93 .uleb128 0x4 .4byte0 .4byte0 .LLST12: .4byte.LVL12 .4byte.LVL15 .2byte0x6 .byte0x50 .byte0x93 .uleb128 0x4 .byte0x51 .byte0x93 .uleb128 0x4 .4byte0 .4byte0 .LLST13: .4byte.LVL13 .4byte.LVL20 .2byte0x1 .byte0x53 .4byte.LVL25 .4byte.LVL26 .2byte0x1 .byte0x53 .4byte0 .4byte0 .LLST14: .4byte.LVL8 .4byte.LVL10 .2byte0x3 .byte0x9 .byte0xff .byte0x9f .4byte.LVL10 .4byte.LVL16 .2byte0x2 .byte0x91 .sleb128 -56 .4byte.LVL16 .4byte.LVL18 .2byte0x1 .byte0x53 .4byte.LVL18 .4byte.LVL25 .2byte0x2 .byte0x91 .sleb128 -56 .4byte.LVL25 .4byte.LVL26 .2byte0x1 .byte0x53 .4byte.LVL28 .4byte.LVL30 .2byte0x1 .byte0x50 .4byte.LVL30 .4byte.LVL31 .2byte0xc .byte0x70 .sleb128 0 .byte0xf7 .uleb128 0x29 .byte0x74 .sleb128 0 .byte0xf7 .uleb128 0x29 .byte0x1b .byte0xf7 .uleb128 0 .byte0x9f .4byte.LVL31 .4byte.LVL33 .2byte0x1 .byte0x54 .4byte.LVL35 .4byte.LVL36 .2byte0x1 .byte0x54 .4byte.LVL37 .4byte.LVL38 .2byte0x1 .byte0x54 .4byte0 .4byte0 .LLST15: .4byte.LVL27 .4byte.LVL28 .2byte0x1 .byte0x50 .4byte0 .4byte0 .LLST16: .4byte.LFB58 .4byte.LCFI2 .2byte0x2 .byte0x7d .sleb128 0 .4byte.LCFI2 .4byte.LFE58 .2byte0x2 .byte0x7d .sleb128 8 .4byte0 .4byte0 .section.debug_aranges,"",%progbits .4byte0x34 .2byte0x2 .4byte.Ldebug_info0 .byte0x4 .byte0 .2byte0 .2byte0 .4byte.LFB55 .4byte.LFE55-.LFB55 .4byte.LFB56 .4byte.LFE56-.LFB56 .4byte.LFB57 .4byte.LFE57-.LFB57 .4byte.LFB58 .4byte.LFE58-.LFB58 .4byte0 .4byte0 .section.debug_ranges,"",%progbits .Ldebug_ranges0: .4byte.LFB55 .4byte.LFE55 .4byte.LFB56 .4byte.LFE56 .4byte.LFB57 .4byte.LFE57 .4byte.LFB58 .4byte.LFE58 .4byte0 .4byte0 .section.debug_line,"",%progbits .Ldebug_line0: .section.debug_str,"MS",%progbits,1 .LASF46: .ascii"UART_ID_Type\000" .LASF62: .ascii"main.c\000" .LASF11: .ascii"uint64_t\000" .LASF13: .ascii"sizetype\000" .LASF32: .ascii"LPC_UART1_TypeDef\000" .LASF47: .ascii"UartID\000" .LASF61: .ascii"GNU C 4.8.4 20140725 (release) [ARM/embedded-4_8-br" .ascii"anch revision 213147] -mcpu=cortex-m3 -mthumb -mapc" .ascii"s-frame -mfloat-abi=soft -mno-sched-prolog -mtune=c" .ascii"ortex-m3 -march=armv7-m -mfix-cortex-m3-ldrd -gdwar" .ascii"f-2 -Os -fno-hosted -ffunction-sections -fdata-sect" .ascii"ions\000" .LASF25: .ascii"ADRMATCH\000" .LASF66: .ascii"main\000" .LASF27: .ascii"RS485DLY\000" .LASF58: .ascii"UARTx\000" .LASF2: .ascii"short int\000" .LASF68: .ascii"GPIO_Init\000" .LASF6: .ascii"uint8_t\000" .LASF69: .ascii"GPIO_SetDir\000" .LASF63: .ascii"/home/ghost/embedded/arm/code/gps_map/lpc1778_uart_" .ascii"test\000" .LASF49: .ascii"errorStatus\000" .LASF40: .ascii"UNS_64\000" .LASF4: .ascii"long long int\000" .LASF23: .ascii"RS485CTRL\000" .LASF29: .ascii"LPC_UART_TypeDef\000" .LASF3: .ascii"long int\000" .LASF55: .ascii"current_error\000" .LASF36: .ascii"ERROR\000" .LASF48: .ascii"baudrate\000" .LASF7: .ascii"unsigned char\000" .LASF26: .ascii"RESERVED10\000" .LASF28: .ascii"RESERVED11\000" .LASF1: .ascii"signed char\000" .LASF12: .ascii"long long unsigned int\000" .LASF9: .ascii"uint32_t\000" .LASF0: .ascii"unsigned int\000" .LASF10: .ascii"long unsigned int\000" .LASF57: .ascii"recalcbaud\000" .LASF37: .ascii"SUCCESS\000" .LASF41: .ascii"UART_0\000" .LASF42: .ascii"UART_1\000" .LASF43: .ascii"UART_2\000" .LASF44: .ascii"UART_3\000" .LASF45: .ascii"UART_4\000" .LASF39: .ascii"char\000" .LASF51: .ascii"bestd\000" .LASF16: .ascii"LPC_GPIO_TypeDef\000" .LASF5: .ascii"int32_t\000" .LASF52: .ascii"bestm\000" .LASF60: .ascii"CLKPWR_GetCLK\000" .LASF33: .ascii"SCI_CTRL\000" .LASF59: .ascii"uart_get_pointer\000" .LASF14: .ascii"RESERVED0\000" .LASF17: .ascii"RESERVED1\000" .LASF18: .ascii"RESERVED2\000" .LASF19: .ascii"RESERVED3\000" .LASF20: .ascii"RESERVED4\000" .LASF21: .ascii"RESERVED5\000" .LASF30: .ascii"RESERVED6\000" .LASF31: .ascii"RESERVED7\000" .LASF22: .ascii"RESERVED8\000" .LASF24: .ascii"RESERVED9\000" .LASF34: .ascii"SYNCCTRL\000" .LASF53: .ascii"best_divisor\000" .LASF15: .ascii"MASK\000" .LASF38: .ascii"Status\000" .LASF8: .ascii"short unsigned int\000" .LASF35: .ascii"LPC_UART4_TypeDef\000" .LASF56: .ascii"best_error\000" .LASF65: .ascii"uart_set_divisors\000" .LASF54: .ascii"divisor\000" .LASF67: .ascii"ITM_RxBuffer\000" .LASF64: .ascii"HardFault_Handler\000" .LASF50: .ascii"uClk\000" .ident"GCC: (GNU Tools for ARM Embedded Processors) 4.8.4 20140725 (release) [ARM/embedded-4_8-branch revision 213147]" |
.LVL24: .loc 1 163 0 orrs r3, r10, fp beq .L29 b .L15 .LVL25: .L25: ldr r0, [sp, #24] mov r5, r6 str r0, [\sp] |
if(best_divisor == 0) |