LPC553x Reference Manual Typo

[Bela1]

Ladies and Gentlemen,

I may have found a misleading declaration in the Reference Manual of LPC553x.

LPC553x Reference Manual, Rev. 3, 07/2023, page 2062:

bit 3, FIFOEN FIFO Enable bit description says:

" 0 - Enables FIFO mode and disables Buffer mode. Any data written to goes to buffer then goes
to conversion. "

To my knowledge, when the data goes to buffer, than the FIFO is disabled and this is called Buffer mode. The next point, which describes when this bit is 1, seems correct.

[pborede]

You information about LPC553x is helpful, I am working on it these days.

Thanks

[Pavel_Hernandez]

Hello, the documentation team says thanks for your findings, the documentation will change this in the next release.

0 - Disables FIFO mode and enables Buffer mode. Any data written to goes to buffer then goes to conversion.

Best regards,
Pavel

[Bela1]

Hello Pavel,

Here is another thing to correct in the Reference Manual.

In Figure 265, Analog subsystem connectivity, some input numbers of the two ADCs are hard to read. See the attached picture, ADCBlock.png please.

[Pavel_Hernandez]

Hello, my name is Pavel, and I will be supporting your case, I did a report let me get some details from the Documentation team.

Best regards,
Pavel

[Bela1]

Hello Pavel,

thank You for the quick reaction. I'd like to call Your attention to the product longevity program of NXP. According to this list:

https://www.nxp.com/products/nxp-product-information/nxp-product-programs/product-longevity:PRDCT_LO...

LPC553x controllers were introduced in aug. 2023 and remain in production for 15 years. They're fairly new chips, I think.

I'm just trying to develop my first circuit with this controller and as newcomer, I discovered some inconsistencies in the documentation. One is mentioned above, it is a failure in the doc.

Another inconsistency is: Standard counter/timers are once mentioned as CTimer, another times simply as Timer: SYSCON->AHBCLKCTRL1, bit 22, 26 and 27 calls them simply Timerx, but these bits belong to CTimer. (Reference Manual, top of page 223)

[Pavel_Hernandez · Accepted solution]

Hello, my apologize I sent a second mail where I am telling you about the fist message was a mistake, I did a report about the misspelled that you found with the document team and I waiting for more details to share.

Best regards,
Pavel

[Bela1]

Hell Pavel,

when You contact the documentation group, could You please ask them, to document in the Reference Manual a few more details?

I think of the followings:

 -There are bits called DAC Isolation. I couldn't find any description, what are they doing.

- Also of DAC: there are two references necessary to operate the DAC: ZTC Current Reference and PTAT Current reference. I swiched them ON, iw works perfect, but I have no idea, what are these two bits doing and why are they necessary.

- There's another "isolation" bit: VREF_ISO. Also couldn't find description, what that is.

For me, HW engineer, isolation means galvanic isolation, but what is then the maximum allowed voltage? I know, in the chip it must be something else, but what?

One more thing:

The Reference Manual gives a hint, how to configure the DAC. One step is missing from there: the OpAmp buffer must be enabled, otherwise, when the data is below 0x6FF, the output is floating, when the data is above 6FF, there's a concrete voltage but its value is wrong, less than half of the preset value.