LPC54606 UART FIFO - can't reset RXERR

[bjoernhaack]

Hi,

I'm unable to reset the RXERR-flag once it occurs.

clearing according to USART_TransferHandleIRQ() from USART driver version 2.0.3:
 /* Clear rx error state. */
base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK;
/* clear rxFIFO */
 base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
 
RXNOTEMPTY, RXFULL, and RXLVL are changing to 0 and staying 0  after clearing rxFIFO. Executing "base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK" in single step mode clears RXERR to 0, but one step later RXERR returns to 1. This even happens if the UART ist disabled before clearing. UART is idle and FIFO stays empty - RXERR = 1...

According to the manual, RXERR should only trigger if the FIFO overflows?! Disabling the rx-FIFO clears the flag, but on re-enabling RXERR appears again...

[bjoernhaack]

I partly backported the fsl_uart.c from the latest SDK 2.9.0 (USART_TransferHandleIRQ() + USART_TransferSendNonBlocking()) and the problem seems solved. My crashing version is SDK 2.4.1.

[pepoja]

Hi Bjoern,

Found you any solution?

Because I have a SAME problem as you.

My environment

MCU: LPC54618J512BD208, IDE: Keil uVision

I don't use LPCOpen HAL or any else. I use my own reg access.

RXERR flag occured directly after enable FIFOCFG->ENABLERX.
RX pin is still in log.1 without change (IOCON is configured for UART5.RX).

WTF?

[bjoernhaack]

Sorry, I don't have a solution yet... And currently no time to provide an example that works on an evaluation board. For me this problem only occurs rarely directly after power up. Chances are ~ 1:25... If startup succeeds, the device runs 24/7 without problems with heavy UART-load... If you are able to find the reason, please share the solution...

[Sabina_Bruce]

Hello Bjoern,

Hope you are doing well.

Could you please confirm the example that you are working with from the SDK so that I may reproduce this behavior from my end. So that I may better understand what is occuring.

Best Regards,

Sabina

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[bjoernhaack]

Hello Sabina,

I'm not using any of the examples. I modified the SDK for my own hardware. The UARTs are using the ringbuffer. The RXERR can be triggered by pausing and continuing the application. I attached some screenshots what happens in the ISR when I try to clear RXERR, single stepping through the ISR. The screenshots were made with an empty FIFO (RXLVL is 0 and stays 0).
Clearing does not always fail, but i have situations where the application is effectively blocked by the ISR trying to clear RXERR in an endless loop.

Best Regards,
Bjoern

[Sabina_Bruce]

Hello Bjoern,

I have attempted to reproduce this behavior  with no luck. The SDK example that we have for ring buffer does not produce this type of error with the evaluation board that we have. I recommend to attempt to use the same structure for your application as the SDK and see if the problem can be reproduced. If not, I'd ask you to create an example that can be reproduced on our evaluation boards so that I can test it and see what is actually occurring. 

Best Regards,

Sabina