Hi everybody
I created my project from the USB composite example for TWRK60, using KSDK 1.3.
On my custom board I have a quartz of 32KHz for the RTC (on the EXTAL32) and no oscillator.
Since external clock from the RTC can only be used as a source for the FLL, the MCG is operating in FEE mode, at 48 MHz for the USB (so I've set DMX32 and DRST_DRS bit of MCG_C4 to 1).
UART and peripherals initialization works fine, I've no problems, but during USB initialization (in particular in usb_dev_soc_init function) I have:
/* USB clock divider */ src=CLOCK_SYS_GetUsbfsSrc(usb_instance); switch(src) { case kClockUsbfsSrcExt: ret = USBERR_BAD_STATUS; break; case kClockUsbfsSrcPllFllSel: freq = CLOCK_SYS_GetPllFllClockFreq(); ret = USB_OK; switch(freq) { case 120000000U: CLOCK_SYS_SetUsbfsDiv(usb_instance, 4, 1); break; case 96000000U: CLOCK_SYS_SetUsbfsDiv(usb_instance, 1, 0); break; case 72000000U: CLOCK_SYS_SetUsbfsDiv(usb_instance, 2, 1); break; case 48000000U: CLOCK_SYS_SetUsbfsDiv(usb_instance, 0, 0); break; default: ret = USBERR_BAD_STATUS; break; } break; }
Variable freq is obtained from the ext clock (32768) multiplied by an FLL factor (1464 as reported in the datasheet), so its value is 32768*1464 = 47972352.
This value could never be identical to 48000000, so it always returns an error!
What can I do? I should replace these macros with the real values?
Thank you in advance.
Hello mircopizzichini:
The USB module is not expected to work with the FLL oscillator (FEE mode), because it is not stable enough to meet the jitter specification. There are some discussions in the community talking about this subject:
Problems with USB running off IRC48
Kinetis KL26xx - USB clock (48 MHz) from 32.768 KHz crystal?
Can the L26Z with 32Khz Xtal generate a clock for USB MSB Device
So you need an external crystal and use the PEE mode. Some of the latest Kinetis MCUs have an internal 48 MHz Internal Reference Clock for USB Device mode, for example the K64 family or the K22FN512/256 (120 MHz).
Regards!,
Jorge Gonzalez
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Or use a dedicated 48MHz clock input on the USB_CLKIN pin.
Regards
Mark
Thank you for your responses. Actually I must work on the current board, so we have not the possibility of adding another crystal.
Changing (brutally) the previous define to 47972352, the composite demo works very well, both Mass Storage and Virtual Com. This is a temporary patch, in the future we'll change the hardware revision.