Status: Text content finished, to be updated with more diagrams/images. Foreword First of all. I have to say sorry for my English since I am not a native speaker. This is my personal experience of using AN2295 on FRDM-KL25Z. I want to share it with anyone who is suffering on it, since the existing release from FSL has not been fully tested on FRDM-KL25Z. (I can figure it out in many ways.) Components and Documents The lastest microcontrollers always have some kind of bootloader to download user code to the flash memory. FSL does offer many bootloaders for various mcu families. Among them, AN2295 bootloader is general purpose for most of these families, since it only requires an UART, either hardware or software UART. To make AN2295 work for a system, the developer must have three components: AN2295 bootloader running on target MCU, such as MKL25Z128VLK4 on FRDM-KL25Z. AN2295 bootloader PC software, such as win_hc08sprg, or my Python script, FcBootloaderProgrammer.py AN2295 aware user application, which has different start address and special treatment for interrupt vector. UPDATE Add an2295_programmer_v1.zip for Python source code, you need install PySerial module for Python 2.5. Please visit following URLs to download necessary files: http://www.freescale.com/files/microcontrollers/doc/app_note/AN2295.pdf http://cache.freescale.com/files/32bit/doc/app_note/AN4767.pdf Software for AN2295 AN4767: UART Boot Loader Design on the Kinetis E Series, a more detail application note for AN2295 on E series. Updates for AN2295 on IAR 6.5 The released AN2295 has to be updated before downloading into FRDM. When you open the AN2295_Kinetis project in IAREW, please update the following setup items in IDE. In workspace window, switch to Kinetis L Debug configuration. Right click on AN2295_Kinetis and open Options. Click on Debugger category. In Setup tab, select PE micro in driver, disable Run to options. (The release leaves it as simulator, and run to __main, which makes warning report when you downloading code to debugger) In Download tab, enable Verify download, Use flash loader, Override default .board file, with $TOOLKIT_DIR$\config\flashloader\Freescale\FlashKLxx128K.board . Disable Attach to program. In PE micro, select interface type as OpenSDA - USB In Tools|Options (IDE Options)|stack, you can leave Stack points not valid until program reaches as blank (Optional). In AN2295_LinkerFile.icf, change IntVectTable_end__ from 0x0000003f to 0x000003FF (Optional). In bootloader_cfg.h, enable AN2295_FRDM_KL25Z_cfg.h, comment out AN2295_TWR_KL25Z_cfg In AN2295_FRDM_KL25Z_cfg.h, #define BOOT_UART_BAUD_RATE 57600 Add gpio.h/gpio.c to project, in case you want use them to indicate something. We can conclude a fact that AN2295 is good enough as a bootloader as it has been tested on many MCU families. The source code is open, so you can custom it for your own specific purposes. However, you have to do it yourself. The reason why I change baudrate is I found VCP of OpenSDA will decode 0x00 send from KL25Z as 0x80. So I slow down to 57600. Updates for PC software of AN2295 Unfortunately, The released (10.0.12.0) and updated (10.0.16.0) versions of bootloader PC software don't work with my bootloader. The released PC software of AN2295 is open source as well. However I am not fan for VC++. I prefer to make my own programmer software with Python, as knows as a clue language. The programmer software is released in Windows exe format and works in command line prompt. The user don't bother to install Python/PySerial and other components. The programmer software works in a simple single shot mode, blank/erase/program actions. D:\an2295_programmer>FcBootloaderProgrammer --help ################################################## FC Booloader Programmer v0.1-alpha - An alternative to Freescale AN2295 on FRDM-KL25Z   by Allan K Liu (C)2013 Ennovation LLC ################################################## Usage: -h, --help      :       This help information -p, --port      :       Serial port setting in Windows, like COMxx, depends on your VCP installation -b, --baudrate  :       Baud rate setup from 9600/19200/38400/57600/152000 -f, --file      :       Hex file (Motorola SREC or Intel HEX) -a, --action    :       Action [blank/erase/program] -d, --debug     :       Debug [0:1]    In order to make it simpler, I prepare some DOS batch files. blank.bat FcBootloaderProgrammer --port=COM14 --baudrate=57600 --debug=1 --action=blank erase.bat FcBootloaderProgrammer --port=COM14 --baudrate=57600 --debug=1 --action=erase program.bat FcBootloaderProgrammer --port=COM14 --baudrate=57600 --debug=1 --action=program --file=DemoApp_4_FC_Bootloader_freedom.srec You can disable debug output optionally. Updates for Demo projects for AN2295 on IAR6.5 In order to run a user application with AN2295 bootloader, you have to rebuild it with modified linker script. You can generate a new app based upon Kinetis L Sample Codeby following steps. Run make_new_project.exe under Kinetis L Sample Code\kl25_sc_rev5\klxx-sc-baremetal\build\iar\ Offer a new project name "DemoApp_4_FC_Bootloader_freedom" according to prompt. Open it in IAR IDE. Change project linker options, enable Override default with $PROJ_DIR$\..\config files\Pflash_32KB_AN2295.icf, the modified linker file. The major changes are: define symbol __ICFEDIT_region_ROM_start__ = 0x00001000; define symbol __ICFEDIT_region_ROM_end__   = 32*1024; define exported symbol __VECTOR_TABLE      = 0x00001000; define symbol __code_start__ = 0x00001410; After building the project, we can get similiar srec file, which has start address at 0x1000. S027000044656D6F4170705F345F46435F426F6F746C6F616465725F66726565646F6D2E7372656331 S1131000F80B0020111400002929000029290000F0 S11310102929000029290000292900002929000084 ...... S1132B200A0D4B4C300000000A0D4B4C31000000E4 S1132B300A0D4B4C320000000A0D4B4C33000000D0 S10B2B400A0D4B4C34000000A7 S9032B0DC4 According to SREC file format, its filename: DemoApp_4_FC_Bootloader_freedom.srec. And it ranges from 0x1000 to 0x1B47 Finally, run "erase.bat", then "blank.bat", then "program.bat" Simple! Other Useful Tools During my development for AN2295, I used some other tools, especially PC terminal to monitor events/traffics on RS232/UART. Future Development Here are my plan. More images for step on step. Smart detection for OpenSDA VCP port. Mutli-thread GUI for bootloader tool. More labs to reduce unnecessary empty flash space on VECTOR_TABLE and flash_protection_table in user application. Support cryptographic/authentication in bootloader to support licenses.

Summary:   This tool is based upon the Audio BiQuad Cookbook Here:   http://www.musicdsp.org/files/Audio-EQ-Cookbook.txt   Very useful for configuring the FRDM-JAM and the MonkeyJam software!     Requirements:   You need a machine with the .net 4.0 Framework (or greater) Installed (Windows 7 or Greater).    If you have issues go here:   Download Microsoft .NET Framework 4 (Standalone Installer) from Official Microsoft Download Center   Instructions:   Just unzip and run the .exe   Please report any problems in the comments section Original Attachment has been moved to: BiQuadFilterView---1.0.0.zip

Trimming internal reference clock of ICS (internal clock source) module using OSDA connection Pavel Šádek, Rožnov, Czech Republic   Simple apps does not require crystal driven clock precision. Internal reference clock based timing of MCU can be used instead.   Manufacturing process yealds to frequency deviation, that is why all MCU devices are factory programmed with a trim value in a reserved memory location. This value is uploaded to the ICS_C3 register and ICS_C4[SCFTRIM] during any reset initialization. For finer precision, trim the internal oscillator in the application and set ICS_C4[SCFTRIM] accordingly.   The TRIM bits effect the ICSOUT frequency if the ICS is in FLL engaged internal (FEI), FLL bypassed internal (FBI), or FLL bypassed internal low power (FBILP) mode.   The internal reference clock can be trimmed also in program time of the device to any value between 31.25 and 39.062kHz, this allows also achieving exotic bus frequencies.  The value applied in Processor Expert does not propagate into Pemicro connection manager. No matter if Processor expert is used or not , we need to configure it it by ourselves in connection of OSDA (same for debugging or programming). So this is a guide how to do so.   In the program initialization we need to initialize the ICS_C3 register and ICS_C4[SCFTRIM]. It can be done siply this way:   /* System clock initialization */   if ( *((uint8_t*) 0x03FFU) != 0xFFU) {     ICS_C3 = *((uint8_t*) 0x03FFU);     ICS_C4 = (ICS_C4 & 0xFEU) | ((*((uint8_t*) 0x03FEU)) & 0x01U);   }   Then hit   flag, choose debug configuration and you will see configuration of your connectons, I have here only OSDA for my Kinetis E Freedom board (it is similar across families of Kinetis, ColdFire or S08 just connection would be SWD, Jtag or BDM) You will get new window   Choose „Advanced Programming Options“ button     Enable calculating of Trim value and programming into Flash location. If the TRIM frequency is different from default, check the box to use custom one in valid range – the one you(or Processor Expert) have used for your timing calculations. Hit DONE and your effort is done!   Next, when you will launch debugging session by hitting bug on button these values will be applied.   My RESULT:   ICS_C3 was trimmed to value of 0x57 for 39.062kHz and 0x9B for 31.250kHz for my Kinetis E Freedom board. Precision is better then 1% in room temp. This is ok for serial comunication without need of crystal for example. Note: Values out from my discovered range of 0x57 – 0x9B leads to frequencies that are out of specification of ICS and should not be used for this exact device.  The limits will be slightly different for every single device.

为了提高我们FAE对客户支持的效率，我们有必要将我们在客户支持过程中遇到的问题和解决方法以FAQ的形式列出来，方便大家查阅和参考。FAQ的形式比较灵活，大家可以以简单问答的形式言简意赅的描述，也可以是参考文章的链接，众人拾柴火焰高，希望大家能多收集问题并及时更新到该帖子中。 版本更新说明： Version 22: Rename "软件和例程" with "软件和文档", Add "常用的应用笔记" into "软件和文档" list; Version 20, 21: Remove "WIFI" solution, Add "SPI接口读写SD卡"; Version 19: Replace "iBeacon" with "BLE"; More version informations, please go to "Kinetis M0+ FAQ 版本更新历史" FAQ使用规范 1.FAQ Notes(Internal Use Only) 芯片选型 1.Kinetis L、E、V、W、M系列选型指南 软硬件开发环境 1.调试工具 2.量产工具 3.开源工具 4.IDE开发环境 5.开发板 硬件设计 1.电路设计注意事项 软件和文档 1.外设模块相关 2.Kinetis SDK 3.Kinetis Bootloader 4. 常用的应用笔记​ 参考设计及解决方案 1.Wireless Charging 2.Motor Control 3.BLE​ 4.M0+ 与Android手机通讯(基于AOAP协议) 5.SPI接口读写SD卡​ 常用网站资料 1.Amobbs（阿莫电子技术论坛） 2.与非网飞思卡尔技术社区 3.21IC飞思卡尔论坛 4.苏州大学教材光盘资料下载区 5.针对飞思卡尔单片机的快速上手指南 6.飞思卡尔MAPS开发板资料​ 7.FAE Technical Blogs​

CONVOCATORIA Freescale Semiconductor, Inc. Convoca al primer concurso de proyectos “Kinetis L MCU Challenge México” “Kinetis L MCU Challenge México” es una competencia de proyectos tecnológicos basado en la herramienta de desarrollo Kinetis Freedom en la cual el participante construye una aplicación alineada a una de las futuras tres tendencias Salud y Seguridad, Efecto Net o Going Green. Los proyectos finalistas serán presentados durante la final del Freescale Cup 2013 el día 7 de Diciembre, a las 9:00hrs en el Centro de Congresos del Tecnológico de Monterrey Campus Guadalajara.  Si resultas ganador, viajarás con todos los gastos pagados al Freescale Technology Forum (FTF) en Dallas, Texas. ¿Cómo puedo participar? Regístrate en Kinetis Challenge antes del 15 de Noviembre de 2013 Crea una aplicación utilizando la herramienta de desarrollo Freedom (en caso de no contar con ella, puedes adquirirla a través de Element 14 (entrega al siguiente día laborable), Mouser (entrega en 4 semanas), o Digikey (entrega de 3 a 5 días hábiles) . Tienes hasta el 15 de Noviembre para subir la información de tu aplicación a la comunidad de Freescale (es necesario hacer log in con tu cuenta en www.freescale.com😞 Nombre de la aplicación 1 párrafo descriptivo de la aplicación Un video descriptivo de hasta 2 minutos El código fuente en formato .zip Subir el proyecto como documento en la sección de Kinetis Microcontrollers en el siguiente formato:  https://community.freescale.com/docs/DOC-94067 El proyecto deberá contener el tag: "Kinetis L MCU Challenge México" para ser identificado como proyecto participante del concurso. Freescale seleccionará 10 proyectos finalistas basándose en los criterios descritos en la convocatoria. Éstos se presentarán en el evento Freescale Cup 2013 el próximo 7 de Diciembre de 2013. Para conocer a los finalistas ingresa aquí. El proyecto ganador, será elegido durante el evento Freescale Cup 2013 por los asistentes al evento, a través de la comunidad Freescale y redes sociales, basándose en los criterios descritos en la convocatoria. El anuncio del proyecto ganador y la entrega de certificados será el  día del evento. La elección del ganador está en tus manos, sigue las instrucciones aquí. ¡Descubre quién es el ganador aquí! Links de interés: Acerca de Otros Recursos Registro Freedom Development Platform Ejemplos de proyectos con Kinetis www.electronicosonline.net/kinetischallenge FRDM-KL25Z Compra de FRDM-KL25Z en Element14 Kinetis L Microcontrollers Compra de FRDM-KL25Z en Mouser Freescale Cup 2013 Compra de FRDM-KL25Z en Digikey FTF Americas 2014 Cómo subir tu proyecto

Overview          KBOOT v2.0 had been released in the Q2 of the 2016 and it has a lot of new features versus the previous version. For instance, the USB peripheral can work as Mass Storage Class device mode now, not just only supports the HID interface. And in following, USB MSD Bootloader implementation will be illustrated. Preparation FRDM-K64F board Fig1 FRDM-K64F KBOOT v2.0 downloading: KBOOT v2.0 IDE: IAR v7.50 Application demo: KSDK v2.0   Flash-resident bootloader           The K64_120 doesn’t contain the ROM-based bootloader, so the flash-resident bootloader need to be programmed in the K64 and the flash-resident bootloader can be used to download and program an initial application image into a blank area on the flash, and to later update the application.         I. Open the the bootloader project, for instance, using the IAR and select the freedom_bootloader demo         The Fig 2 illustrates the bootloader project for K64 which resides in ~\NXP_Kinetis_Bootloader_2_0_0\NXP_Kinetis_Bootloade r_2_0_0\targets\MK64F12. Fig 2      II. After compiles the demo, then clicks the  button to program the demo to the K64 Linker file modification       According to the freedom_bootloader demo, the vector table relocation address of the application demo has been adapted to the 0xa000 (Table 1), however the default start address of the application is 0x0000_0000. So it’s necessary to modify the linker file to fit the freedom_bootloader and the Table 2 illustrates what the modifications are.                                                     Table 1 // The bootloader will check this address for the application vector table upon startup. #if !defined(BL_APP_VECTOR_TABLE_ADDRESS) #define BL_APP_VECTOR_TABLE_ADDRESS 0xa000 #endif                                                   Table 2 define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; define symbol __ram_vector_table_offset__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003FF : 0; //define symbol m_interrupts_start       = 0x00000000; //define symbol m_interrupts_end         = 0x000003FF; define symbol m_interrupts_start       = 0x0000a000; define symbol m_interrupts_end         = 0x0000a3FF; //define symbol m_flash_config_start     = 0x00000400; //define symbol m_flash_config_end       = 0x0000040F; define symbol m_flash_config_start     = 0x0000a400; define symbol m_flash_config_end       = 0x0000a40F; //define symbol m_text_start             = 0x00000410; define symbol m_text_start             = 0x0000a410; define symbol m_text_end               = 0x000FFFFF; define symbol m_interrupts_ram_start   = 0x1FFF0000; define symbol m_interrupts_ram_end     = 0x1FFF0000 + __ram_vector_table_offset__; define symbol m_data_start             = m_interrupts_ram_start + __ram_vector_table_size__; define symbol m_data_end               = 0x1FFFFFFF; define symbol m_data_2_start           = 0x20000000; define symbol m_data_2_end             = 0x2002FFFF; /* Sizes */ if (isdefinedsymbol(__stack_size__)) {   define symbol __size_cstack__        = __stack_size__; } else {   define symbol __size_cstack__        = 0x0400; } if (isdefinedsymbol(__heap_size__)) {   define symbol __size_heap__          = __heap_size__; } else {   define symbol __size_heap__          = 0x0400; } define exported symbol __VECTOR_TABLE  = m_interrupts_start; define exported symbol __VECTOR_RAM    = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start; define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__; define memory mem with size = 4G; define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end]; define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]                           | mem:[from m_text_start to m_text_end]; define region DATA_region = mem:[from m_data_start to m_data_end]                           | mem:[from m_data_2_start to m_data_2_end-__size_cstack__]; define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end]; define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK    with alignment = 8, size = __size_cstack__   { }; define block HEAP      with alignment = 8, size = __size_heap__     { }; define block RW        { readwrite }; define block ZI        { zi }; initialize by copy { readwrite, section .textrw }; do not initialize  { section .noinit }; place at address mem: m_interrupts_start    { readonly section .intvec }; place in m_flash_config_region              { section FlashConfig }; place in TEXT_region                        { readonly }; place in DATA_region                        { block RW }; place in DATA_region                        { block ZI }; place in DATA_region                        { last block HEAP }; place in CSTACK_region                      { block CSTACK }; place in m_interrupts_ram_region            { section m_interrupts_ram }; SB file generation     I. Brief introduction of SB file         The Kinetis bootloader supports loading of the SB files. The SB file is a Freescale-defined boot file format designed to ease the boot process. The file is generated using the Freescale elftosb tool. The format supports loading of elf or srec files in a controlled manner, using boot commands such as load, jump, fill, erase, and so on. The boot commands are prescribed in the input command file (boot descriptor .bd) to the elftosb tool. The format also supports encryption of the boot image using AES-128 input key.          And right now, the USB MSD bootloader only support SB file drag and drop.    II. Generate the BIN file         After open the hello_world demo in the IAR, using project options dialog select the "Output Converter" and change the output format to "binary" for outputting .BIN format image (Fig 3). Next, build the application demo, then the .BIN file will be generated after the building completes. Fig 3      III. Create BD file There is a template BD file which resides in the ~\NXP_Kinetis_Bootloader_2_0_0\NXP_Kinetis_Bootloader_2_0_0\apps\led_demo\src. Next, adapt the BD file by referring to the Kinetis Elftosb User's Guide, the following table shows the BD file content.                                                    Table 3 sources {         # BIN File path         myBINFile = "hello_world.bin"; } section (0) {         #1. Erase the internal flash         erase 0x0000a000..0x0010000;         #2. Load BIN File to internal flash         load myBINFile > 0xa000;         #3. Reset target.         reset; }      IV.  SB file generation          After creating the BD file shown in the following figure, copy the "hello_world.bin", elftosb.exe, and the BD file into the same directory. Then, open the window with command prompt and invoke elftosb such as “elftosb –V –c FRDM-K64F.bd –o image.sb”. The elftosb processes the FRDM-K64F.bd file and generates an image.sb file. Elftosb also outputs the commands list as shown in Fig 4. Fig 4     V. Application code updating       Plug a USB cable from the PC to the USB connector J26 to power the board , then keep holding the button SW2 down until press and release the Reset button SW1, it can force the K64_120 enter the BOOTLOADER mode. Next, plug another USB cable from the PC to the USB connector J22 (Fig 5), the FSL Loader will come out after completes the enumeration and it will appear as a removable storage driver (Fig 6).  Copy & paste or drag & drop the image.sb to the FSL Loader drive to update the application code, and the Fig 7 illustrates the result of application code runs. Fig 5 Fig 6 Fig 7

        IAR使用过程中有一点不太方便的是：当我们打开一个工程之后，如果再直接双击其他eww文件试图打开另外的工程，那么原来的工程就会被覆盖。解决这个问题的方法是：        1. 双击FileTypesMan.exe（该软件见附件，32位系统请解压filetypesman_x86.zip文件，64位系统请解压filetypesman_x64.zip文件）。打开该软件之后，找到.eww 格式并单击一下，显示界面如下图所示：             2. 双击open 所在行，对此条目进行更改，将Command-Line 中的内容：C:\PROGRA~2\IARSYS~1\EMBEDD~1.0\common\bin\IarIdePm.exe "%1" 先复制出来，Default Action 不选，Disable勾选，如下图所示：       3.在FileTypesMan界面的下方区域点击右键，选择New Action，如下图所示：            4.新建action 如下图所示，Action Name和Menu Caption 可随便命名，Command-Line 将上一步复制的内容粘贴过来即可。Default Action 勾选，Disable不选。          5. 最后配置如下图所示：       经过以上简单设置之后，就可以通过直接双击eww文件打开多个工程了。                  Original Attachment has been moved to: filetypesman_x64.zip Original Attachment has been moved to: filetypesman_x86.zip

One of the new features that can be found on the FRDM-K82F is the FlexIO header. It’s be specifically designed to interface with the very cost-efficient OV7670 camera, and uses 8 FlexIO lines to read data from the camera. By using the FlexIO feature, it makes it easy to connect a camera to a Kinetis MCU. A demo is included with Kinetis SDK 1.3 which streams the video data from the camera to a host computer over USB. FlexIO: The FlexIO is a highly configurable module found on select Kinetis devices which provides a wide range of functionality including: • Emulation of a variety of serial/parallel communication protocols • Flexible 16-bit timers with support for a variety of trigger, reset, enable and disable conditions • Programmable logic blocks allowing the implementation of digital logic functions on-chip and configurable interaction of internal and external modules • Programmable state machine for offloading basic system control functions from CPU All with less overhead than software bit-banging, while allowing for more flexibility than dedicated IP. Running the Demo: First you’ll need to setup the hardware. An 18 pin header needs to be installed on the *back* of the board. The camera is oriented this way to allow for use of shields on the top, even if the camera is being used. This way the functionality could be extended with WiFi or LCD shields. After the header is soldered on, plug in the camera. It will look like the following when complete: Next we need to program the K82 device with the example firmware. The software can be found in the Kinetis SDK FRDM-K82F stand-alone release, in the C:\Freescale\KSDK_1.3.0_K82\examples\frdmk82f\demo_apps\usb\device\video\flexio_ov7670 folder. Open the project, compile, and program the example specific for your compiler like done for other examples. Make sure you also compile the USB Device library as well. After programming the K82, unplug the USB cable from J5 (OpenSDA) and plug it into J11 (K82 USB). The board will enumerate as a generic USB video device called “USB VIDEO DEMO”. You can then use this device with any video capture software, like Skype or Lync.  Here's a shot of the clock in my cube: The resolution is 160*120, the video image format is RGB565. You may need to manually adjust the focus by rotating the lens on the camera. The frame rate can also be sped up by modifying line 342 in usb_descriptor.c: 5fps: 0x80,0x84,0x1E,0x00, /* Default frame interval is 5fps */ 10fps:  0x40,0x42,0x0F,0x00, 15fps:  0x2A,0x2C,0x0A,0x00, 20fps:  0x20,0xA1,0x07,0x00, The 160*120 max resolution was determined by the amount internal SRAM of the device, as there is not external RAM on the FRDM-K82F board. More Information: One of many places to buy the OV7670 camera module​ OV7670 Reference Manual​ FlexIO Overview ​ FlexIO Training presented at FTF

Hello Kinetis friends! The launch of new Kinetis devices and development tools called "Kinetis K2" brought some new K22_120 MHz devices to the K22 family portfolio. :smileyinfo: Please notice the name "Kinetis K2" only refers to the Kinetis generation, but it is not related to part number (e.g. K63/K64 are part of K2 generation). Previously existing Kinetis portfolio already had some K22_120 MHz devices, so this  caused confusion regarding the documentation, header files, features, development boards and others, because the part numbers are very similar. I created the next reference table outlining the existing K22_120 MHz parts with their corresponding files and boards. The last column is an overview of the features or peripherals that are either missing or added in each device. :smileyalert: IMPORTANT NOTES:           - I gathered and put together this information as reference, but it is not official. For the most accurate information please visit our webpage www.nxp.com.           - Header files MK22F12.h and MK22FA12.h apply for legacy K22_120 devices. However TWR-K21F120M(A) board has a K21_120 part, so use MK21F12.h or MK21FA12.h instead.      Colleague Carlos Chavez released an Engineering Bulletin (EB811) with good information related to this document:      http://cache.nxp.com/files/microcontrollers/doc/eng_bulletin/EB811.pdf Regards! Jorge Gonzalez

Test environment: FRDM-K64F Rev.D IAR ARM Workbench IDE V8.30.1 MCUXpresso SDK for FRDM-K64F v2.4.2(2018-08-02) Test project is [ftm_output_compare] located with default path: ..\FRDM-K64F\boards\frdmk64f\driver_examples\ftm\output_compare Test reason to verify the CnV register is updated on the next FTM counter change. Three test signals: FTM0_CH0 pin as output compare pin will generate square signal with 1.33KHz . FTM0_CH1 pin generate 24KHz Edge-Aligned PWM signal(High-true pulses (clear Output on match)) with 50% duty cycle as FTM counter monitor. When FTM counter change, the FTM0_CH1 will toggle to output high voltage. Test using a delay() function to emulate modify FTM0_CH0 output compare mode and CnV value periodically. There is a GPIO pin will toggle after each delay() function to detect/verify the CnV value actual load point. FlexTimer module setting: The FTM0 refer clock is 60MHz For the FTM0_CH1 pin generate 24KHz PWM signal, the FTM0 MOD value is fixed to 0x9C3 (60MHz/24KHz = 2500).   Below is the overall signals: Test Process Record: During FTM0 module initialization, set the FTM0_CH0 pin output compare value to 0xA00 (more than MOD register value (0x9C3)) with below code: Set the CnV value more than MOD register is to avoid the output compare be set during at start. After that,  enable FTM0 counter and toggle GPIO pin to set a mark: After delay, toggle GPIO pin and update CnV register to 0x270 (the match point is half of the PWM high voltage). The actual signal is : After the first CH0 output compare set match, before set CH0 pin clear on match. It need to keep the CH0 pin with same output compare mode and set CnV back to 0xA00 (more than MOD) again with below code: Then we set CH0 with clear on match mode and update CnV value to 0x752 (middle of CH1 PWM low voltage): The actual signal is: With the similar code, before next CH0 set on match, it need to keep the CH0 pin with same match compare mode setting and CnV change back to 0xA00 (more than MOD). The actual signal is below: Note: During the output compare signal compare mode set/clear change phase, it need to keep previous output compare mode setting, please don't using kFTM_NoOutputSignal setting at code. Otherwise, the output compare signal will exist decay: Test Result: From FTM0 register value, the FTM0_SYNCONF[SWRSTCNT] bit is clear, which means select Legacy PWM synchronization method. The legacy PWM synchronization method will update Output Compare mode CnV register value at the next FTM counter change. The actual signal also verify it. Below is FTM0 all registers value: For the more detailed info, please check the original thread at here. Please check attachment about test code.

The SysTick is a part of the Cortex-M0+ core and so is not chip specific - for details of the Cortex core you generally need to use ARM documents. For SysTick: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0179b/ar01s02s08.html By summary, the SysTick is configured through four registers: 1. SysTick Control and Status(CSR): basic control of SysTick e.g. enable, clock source, interrupt or poll COUNTFLAG: count-down flag, if down to 0, then this bit will be set to 1, otherwise, it will be 0. CLKSOURCE:  when using internal core clock, it will be 1. If using external clock, it will be 0. TICKINT: interrupt enabled when setting to 1. ENABLE: counter enabled when setting to 1. 2. SysTick Reload Value(RVR): value to load Current Value register when 0 is reached. 3. SysTick Current Value (CVR): the current value of the count down. 4.SysTick Calibration Value(CALIB): contain the number of ticks to generate a 10ms interval and other information, depending on the implementation. TENMS: tick value for 10 ms. To configure the SysTick you need to load the SysTick Reload Value register with the interval required between SysTick events. The timer interrupt or COUNTFLAG bit is activated on the transition from 1 to 0, therefore it activates every n+1 clock ticks. If a period of 100 is required 99 should be written to the SysTick Reload Value register. See attached code on how to generate microsecond delay.

I created this spreadsheet from the data in the user manual. Exported here as Microsoft Excel but I encourage folks to use the link below to Google Docs. Useful when documenting how pins will be used. Highlight the intended alternate function of a pin. Use commenting to resolve issues when collaborating with others. Add notes to better describe how a pin is used for a particular application. K64 Pins Template - Google Sheets

Hey there Kinetis lovers!  We in the Systems Engineering team for Kinetis Microcontrollers see all kinds of situations that customers get into, and none can be particularly troubling like how the reset pin is handled.  The purpose of this document is to provide a list of Frequency Asked Questions (FAQ) that we get here in the Kinetis Systems Engineering department.  This is intended to be a living list and as such, may in no way be complete.  However we hope that you will find the below questions and answers useful.   Q:  Do I need to connect the reset signal to be able to debug a Kinetis device?   This is a commonly asked question. Strictly speaking, you do not need to connect the device reset line of a Kinetis device to the debug connector to be able to debug. The debug port MDM-AP register allows the processor to be held in reset by means of setting the System Reset Request bit using just the SWD_CLK and SWD_DIO lines.   However, before deciding to omit the reset line from your debug connector you should give some careful thought to how this may impact the ability to program and debug the device in certain scenarios. Does the debugger/flash programmer or external debug pod require the reset pin? It may be that the specific tool you are using only supports resetting the device by means of the reset line and does not offer the ability to reset the device by means of the MDM-AP. Have you changed the default function of the debug signals? You may need to use the SWD_CLK and/or the SWD_DIO signals for some other function in your application. This is especially true in low pin count packages. Once the function is changed (by means of the PORTx_PCRy registers) you will no longer have access to the MDM-AP via those signals. If you do not have access to the reset signal then you have no way of preventing the core from executing the code that will disable the SWD function of the pins. So you will not be able to re-program the device. In order to prevent this type of situation you need to either: Setup your code to change the function of the SWD pins several seconds after reset is released so that the debugger can halt the core before this happens. Put some kind of “backdoor” mechanism in your code that does not re-program the SWD function, or re-enables the SWD function, on these pins. For example, a specific character sequence sent via a UART or SPI interface.   Some Kinetis devices allow the reset function of the reset pin to be disabled. In this case you can only use the SWD signals as a means of resetting the device via the MDM-AP. If you change the SWD pin function in addition to disabling the reset pin then you must provide a backdoor means of re-enabling the SWD function if you want to be able to reprogram the device.

I’ve noticed some comments about Kinetis MCUs availability and status that I’d like to address for the entire community. The Kinetis MCU portfolio has seen significant growth in the mass market and is on track for continued strong growth in the coming years. Due to this growth, the demand on the Kinetis MCUs has outstripped the available supply, leading to extended leadtimes.  We have invested additional resources across the manufacturing line for 2018 and beyond to increase overall capacity and are pleased to be able to communicate that the lead time is being reduced from 39 weeks to low 30's this month.  It is anticipated there will be further reduction in Q3 2018 with a target of being back to a typical 12-14wk lead time in Q1 2019.  Additionally, we have increased our product longevity commitment on Kinetis K, L, E, V, M and W MCUs to 15 years to support the strong pipeline of design-in activity across the Kinetis portfolio that we are seeing in the market.  This document was generated from the following discussion: Kinetis Availability & Longevity

中文版本：     相信很多博友在调试ARM代码的时候，尤其是涉及到操作底层的时候，由于一些误操作常常会遇到Hard fault错误或者程序跑飞的情况，这些bug采用正常的方法是比较难定位的，往往需要我们逐行去排查测试，最后看的眼花缭乱，永远给人以苦逼程序员的印象，呵呵。此篇内容致力于节省广大程序员的精力，以崭新的一种方法角度或者说是手段来定位跟踪bug（仅限于支持Coresight技术的ARM处理器，本篇只讲针对M0+内核的），故冠之以“原创猛料”之称号，希望能名副其实，好了，闲话不多说，呵呵，开整……     ARM的Coresight技术估计大家有所耳闻（没听过的可以参考我之前的一篇介绍类文章http://blog.chinaaet.com/detail/29770.html），它实际上包括了ARM嵌入到其处理器内核的片上跟踪调试组件和相关的配套系统软件标准之类的，方便我们开发调试ARM产品。可能单说Coresight技术有点太泛了，把它具体化的话就不得不提到ETB（Embeded Trace Buffer）和MTB（Micro Trace Buffer）这两个经典的模块，其中ETB模块是Cortex-M3/M4内核的片上跟踪单元，而MTB模块则是Cortex-M0/M0+内核的跟踪单元。不过估计很多人没有用过，所以我就本着“吃螃蟹”的态度去尝试了一番，结果还是挺让我惊喜的，灰常好用，所以下面我就把使用方法分享给大家供大家评估，本文以MTB模块调试飞思卡尔基于Cortex-M0+内核的Kinetis L系列为例：     在介绍使用方法之前需要提一下，目前我测试的结果是J-link暂不支持MTB模块（但是支持ETB模块），所以我使用了OpenSDA平台的CMSIS-DAP固件来调用MTB模块，所以如果你手中有Kinetis L系列的Freedom板的话就直接可以跟我做了，其中CMSIS-DAP固件在本博客附件中，使用方法仍旧是类似更新OpenSDA的应用，不过换过CMSIS-DAP固件之后OpenSDA的小灯可能不亮，这个纯属正常，不要惊慌，哈哈。 测试环境：IAR6.6 + Freedom OpenSDA（CMSIS-DAP firmware） 测试目标芯片：Kinetis MKL25Z128     1）打开一个KL25的demo例程，然后右键工程Options->Debugger，选择“CMSIS-DAP”调试器，然后其他默认即可，设置完毕，点击“OK”，如下图所示：     2）点击调试按钮，进入调试界面，此时菜单栏会出现CMSIS-DAP选项，选择CMSIS-DAP->ETM Trace，调用MTB模块，弹出跟踪窗口，如下图所示。默认情况下跟踪功能是禁止的，此时点击跟踪窗口ETM Trace左上角的“电源符号”，打开跟踪功能，此时调试界面的左上角的ETM显示绿色，表示已经打开；     3）此时MTB功能已经打开，我们可以点击“全速运行”，然后再点击“暂停”，此时就可以在ETM Trace跟踪窗口看到从运行到断点停止这段时间所有的指令执行情况了，非常直观，如下图所示，此外可以选择同时查看汇编和C语言，也可以保存跟踪的结果，进而分析程序执行情况。     说到这，我们就该想到这种方式的好处了吧，如果遇到Hardfault或者程序跑飞的时候，通过设置断点或者点击暂停，然后就可以捕捉到出现hardfault或者程序跑飞的之前的程序执行情况从而帮助我们快速定位到bug的地方，非常方便实用。此外，实用CMSIS-DAP调试工具还有一个好处是，可以使用很多插件了，比如Timeline等等，灰常不错，哈哈~ English Version：     As we know, ARM Coresight, the ARM debug and trace technology, is the most complete on-chip debug and real-time trace solution for the entire System-On-Chip(SoC), making the ARM processor-based SoCs the easiest to debug and optimize. In this technology, the ETB in  Cortex-M3/M4 and MTB in Cortex-M0/M0+ are representative two units, which can effectively help us to monitor the process of software executing or focus on some hard faults by tracing the instructions.     In the article, I wanna introduce the MTB useage in our product Kineits L series, which may be helpful to some customers using KL chip. But, before that, a CMSIS-DAP firmware for OpenSDA platform is needed, which you can find in the attachment of this article. So far as I know, it seems that J-Link don't support MTB yet, but do support ETB of Cortex-M4. Testing Platform:     IAR EWARM6.6 + FRDM KL25 (OpenSDA with CMSIS-DAP fimware) Testing steps:     1) firstly, update the OpenSDA with CMSIS-DAP fimware, just like other OpenSDA applications;     2) open any KL25 demo with IAR, access project setting "Options->Debugger", and select the "CMSIS-DAP" adapter as the screenshot shown below;     3) click the debug button to access thw debug window, then click the CMSIS-DAP->ETM Trace from the menu bar,  and the ETM trace window will appear. Note that, the trace function is disabled in default, so another step is needed to click the "power port" at the top left corner to enable the trace function. The screenshot shows it below;     4) Now, the MTB is working. We can try it by click "run" and wait a while to click "pause", then the instructions from run to pause are shown in the trace window, it is really convenient. Besides, we can save, clear or zoom the trace results. Conclution:    Through the above method, some painstaking issues like hardfault or program fleet can be captured simply by setting breakpoints or mannuly pause, which can help to positioning the source of the problem. Beyong that, the CMSIS-DAP can support plugs like timeline tool. BTW, it is a pity that MTB unit in the new Kinetis E series is cut out.         Happy Tracing!

Overview The Sub-GHz Remote Control Dimmer is a reference design which demonstrates the functionality of the MKW01Z128 MCU working in a custom IEEE 802.15.4 star network.   This reference design is focused on a home automation application where the user is able to control various RGB bulbs connected into a network using the KW01-RCD-RD board as a remote control. Controlled devices are USB-KW019032 boards, and each board simulates an RGB bulb in a GUI.   Sub-GHz technology has some advantages over other wireless technologies such less data traffic in its respective ISM band.   Features: Documentation: Quick start guide Application users guide Board users guide Software user guide Schematics, Software, GUI and BSP: Link Best regards, Luis Burgos.

Kinetis Programming using PE multilink Connect All the VDD to +3.3V and all VSS to GND. Connect 10K pullup resistor to RESET_b pin of the controller. If the controller have the option of JTAG/SWD/EZport make sure to connect 10K pullup resistor to NMI_b or EZP_CS_b pin. NMI_b pins selects the interrupt to highest priority so the controller won't enter into programming mode and EZP_CS_b pin is used for selecting Ezport programming method.   At factory reset condition, all the controller is in the continuous watchdog enabled mode and constantly resetting and the voltage level on the reset pin will be approx 1.64V after adding the pullup resistor as mentioned in point 2. Do not add any filter capacitor on the reset pin while programming the controller for the first time. As it will not let the logic level go low while programming. Which is essential. On probing the reset pin to the oscilloscope the following will be the pattern Before programming we need to mass erase the controller otherwise it will be in continuous reset mode. And to do that we need to configure SWD/JTAG mode. The following configurations for K20P48 LQFP in SWD mode. For mass erase following steps we need to follow. Search for thunderbolt icon in code warrior ie flash programmer and click on the drop-down menu on the icon.     Click on edit then      After configuring the above settings then click on the erase whole device option shown on step 9. If the microcontroller have JTAG/SWD and EZPORT then connect the microcontroller to JTAG port using PORT B of multilink with 20 pin headder. Try avoiding jumpers instead connect the 20 pin cable provided with PE multilink programmer. As all GND pins need to be connected on board's GND.   If the problem still persist then refer to this link Freescale community programmer

The following file contains example code for usage of ADC, UART, DAC, GPIO, I2C, interrupts, MCG and timers for the k53 platform. Regards.

Overview      This document describes how to use ezport module on TWR-K22F120M,  and the usage of ezport on other platforms  is similar.      The EzPort module is a serial flash programming interface that enables In-System Programming (ISP) of flash memory contents in a 32-bit general-purpose microcontroller.      The block diagram of EzPort module is as follows: Hardware environments TWR-K60D100M TWR-K22F120M TWR-SER Primary and Secondary Tower boards      Because the EzPort module is a serial flash programming interface that is compatible with a subset of the SPI format. TWR-K60D100M is used as a SPI master and TWR-K22F120M is used as a slave. The flash memory contents of TWR-K22F120M can be read/erased/programmed from TWR-K60D100M.      Connect the TWR-K60D100M and TWR-SER by two tower boards, the execution result will be outputed by uart. Step 1：TWR-K22F120M enters into EzPort mode Hardware setup:       If the TWR-K22F120M wants to enter EzPort mode, the EZP_CS pin should be asserted and then reset pin is asserted. TWR-K60D100M                         TWR-K22F120M PTC6(J11 A71)                           EZP_CS(J31 Pin9) Software setup: Open the project “ezport_test_kinetis”; Define the MACRO “ENTER_EZPORT_MODULE” in hal_config.h; Build and download the program into TWR-K60D100M, run it, then EZP_CS pin of TWR-K22F120M will be asserted. Then power-on the TWR-K22F120M. The TWR-K22F120M will enter into EzPort mode. Step 2: Use EzPort to read/erase/program the flash Hardware setup: TWR-K60D100M                         TWR-K22F120M PTD0(J11 B63)                            EZP_CS(J31 Pin9) PTD1(J11 B64)                            EZP_CLK(J31 Pin4) PTD2(J11 A76)                            EZP_DI(J31 Pin8) PTD3(J11 A77)                            EZP_DO(J31 Pin6) GND(J11 B65)                             GND(J31 Pin5) Note: TWR-K60D100M and TWR-K22F120M should have common ground. Software setup: Open the project “ezport_test_kinetis”; Undefine the MACRO “ENTER_EZPORT_MODULE” in hal_config.h, then EzPort test codes will be enabled; Build and download the program into TWR-K60D100M, run it, then the flash memory contents of TWR-K22F120M can be read/erased/programmed from TWR-K60D100M, the execution result will output to the console by uart.

Hi,, Can anyone please post the code for SPI (Serial peripheral interface) using MK22D5.h....I tried doing using processor expert but im getting errors in the main program..please post the code for SPI Thank you