cannot perform mass erasing for secured MKE02Z64 via SWD

[jumblerchi]

Hi All:

   I am a newbie for MCU/SWD programming.

   Currently, I encounter a problem about mass erasing for secured MKE02Z64 via SWD.

I perform unsecuring steps by following the steps of section 18.3.7.2 in KE02 sub-family reference manual as followings.

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1. Reset the device by asserting RESET pin or DAP_CTRL[3].

2. Set DAP_CTRL[0] bit to invoke debug mass erase via SWD Functional description

3. Release reset by deasserting RESET pin or DAP_CTRL[3] bit via SWD.

4. Wait till DAP_CTRL[0] bit is cleared ( After mass erase completes, DAP_CTRL[0]

bit is cleared automatically). At this time, CPU will be in hold state, MASS erase is

completed, and the device is in unsecure state (flash security byte in flash

configuration field is programmed with 0xFE) .

5. Reset the device.

---

After performing step 1 ~ 3, I still cannot wait for the DAP_CTRL[0] bit is cleared.

I don't know whether I miss something in the steps.

Does the DAP_CTRL[0] bit mean MDM-AP control register bit 0 ?

If not, how can I get the DAP_CTRL[0] bit ?

Thanks for your help ~

Jumbler

[Rick_Li]

Hi Jumbler,

Could you please let me know how did you perform step 1~3?

And what tools do you use?

[jumblerchi]

Hi Yong:

I use the proprietary s/w implemented by my company to connect the MKE02Z64 via CMSIS-DAP protocol.

First, the s/w connects the device via SWD and get its IDCODE as well.

Then, I perform step 1 ~ 3 by following the steps of KE02 reference manual.

Step 1, I use the DAP_SWJ_Pins command to reset the device by asserting RESET pin low, and

    set the bit3 of MDM-AP control register by the DAP_Transfer command.

Step 2, I set the bit0 of MDM-AP control register to invoke debug mass erase.

Finally, I de-assert RESET pin low to release reset and set the bit3 of MDM-AP control register.

Then, I get the content of MDM-AP status register, which value is '0x07'.

According the manual's description,  the bit of flash mass erase acknowledge is set , the bit of flash ready is set and the bit of system security is on.

That the bit0 is set means the mass erase operation has started.

My question is how do I check whether the erasing is completed.

I try to check the bit0 of MDM-AP status register, but it is set always.

Do you have any suggestion or idea ?

Thanks for help

regards

[Rick_Li]

Hi Jumbler Chi,

The Attached is from my colleague, you will find a script that I used on a Freedom KE02Z40M board.  The way that I have it set up right now, it will only read the MDM-AP Status register.　 Reading the the MDM-AP Status register will allow you to determine the state of the device prior to the attempted Mass Erase.　 If you uncomment, the commented lines, it will execute the Mass Erase. 

[jumblerchi]

Hi Yong Li:

  Thanks for your script. :smileyhappy:

What time unit is used in 'sleep' command to wait for result ? 

second ? or milli-second ?

Regards

Jumbler

[PatriciaTeran]

Hi, Jumbler

Were you able to solve your problem?

Regards

Patricia