Hi Martin,
I have configured the device in the Internal Reference Mode. I am using MKM34Z256VLQ7.
I am not getting the 1.2V on VREF Pin. But I am getting 1.2 V on VREFH pin. Here is the Code for reference.
void main()
{
SMC_Init (SMC_MODULE_VLPS_ON_VLLS_ON_CONFIG);
/* initialize SIM module */
SIM_Init (SIM_MODULE_NORM_MODE_SYSCLKMODE_SYSCLK_DIV1_CONFIG);
SIM_SelClkout (CLKOUT_SRC1);
PORT_Init (PORTF,PORT_MODULE_ALT3_MODE,PIN7);
/* clock mode 2:1:1, 48MHz */
SIM_SetClkMode (SYSCLK_MODE1);
SIM_SetClkDiv (SYSCLK_DIV1);
FLL_Init (FLL_MODULE_FEE_48MHZ_CONFIG);
/* sets 32 kHz RTC Oscillator as the source of the PLL and enable PLL */
PLL_Enable (PLL32KREF_SRC1);
/* VREF module must be initialized after SIM module */
VREF_Init (VREF_MODULE_CHOP_ON_1V75_0V4_HPWR_CONFIG,
VREF_SWITCH_S1_H_S2_L_S3_L_BUFF_EN);
VREFL_Trim( 3); /* VREFL trimmed to 0.400 V */
}
/***************************************************************************//*!
* @brief Voltage reference switch setting.
* @details Configures voltage reference switches:
* - Buffer enable,
* - Buffer drive voltage on PAD, S1 = H,
* - Internal reference select, S2 = L,
* - AFE Internal reference select, S3 = L,
* @showinitializer
******************************************************************************/
#define VREF_SWITCH_S1_H_S2_L_S3_L_BUFF_EN \
(tVREF_S){ \
/* SIM_MISC */ CLR(SIM_MISC_CTL_VREFBUFPD_MASK)| \
/* ......... */ CLR(SIM_MISC_CTL_VREFBUFINSEL_MASK)| \
/* ......... */ SET(SIM_MISC_CTL_VREFBUFOUTEN_MASK), \
/* VERFL_TRM */ CLR(VREF_VREFL_TRM_VREFL_SEL_MASK), \
}
Please suggest the solution.
Regards,
Dhruv
Hi Druv,
software setting looks correct.
Note that when internal 1.2 V VREF is routed through VREF buffer out to VREF pin, then 100 nF capacitor must be connected between VREF and GNDA.
Kind regards,
Martin M.