KL03 SPI: SS pin high between byte transfers how to keep it low?

[ciandonovan]

Hi there,

I'm using the FRDM-KL03 development board to communicate over SPI with a nRF24L01+ radio. The radio requires a continuous low signal on Slave Select for the entire period of transfer, yet the KL03 pulses the SS pin high between each byte transfer, confusing the radio into thinking that transmission has restarted. I have read through the KL03 reference manual and couldn't find anything on keeping the SS pin continuously low throughout the transfer. Is there a way to disable this auto high-pulse?  

[ciandonovan]

Hi Mark thanks for your reply,

Out of curiosity do you know if it's even possible to disable auto-CS or is that feature not available at all? 

I tried manually toggling the CS line before and after calling the spi transfer function, but that caused a timing issue since the falling edge of the CS was before the first RTS pulse on the SCK line. Would you suggest I edit the source of the SDK and embed the CS functionality in there?

[mjbcswitzerland]

Hi Cian

If there are timing problems add a wait for the Rx buffer to become full after the end of transmission before negating the SS line.

I don't work with KDS since it may have restrictions - instead this is already solved in the uTasker project for KL03 since it allows tested nRF24L01 operation by simple enabling a define (nRF24L01_INTERFACE):
http://www.utasker.com/kinetis/FRDM-KL03Z.html

Regards

Mark

[mjbcswitzerland]

Hi

Simply control the CS line as a GPIO; there is little advantage in using the auto-CS feature since it is usually simpler and faster (using the port toggle instruction) to do it 'manually'.

Regards

Mark