How to get a SRAM section without initialize in K312?

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How to get a SRAM section without initialize in K312?

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Reyna_pan45
Contributor II

Hi everyone

  I need to pass some information from boot to the app,so I think it's a good way to get some uninitialize SRAM section ,and define some variant here,as you can see:

Reyna_pan45_0-1726225149954.png

Reyna_pan45_1-1726225171064.png

Reyna_pan45_2-1726225281385.png

But when I read the values of these variables, there are some hardware failures:

Reyna_pan45_3-1726225494045.png

 

So Maybe there's something wrong with the way I wrote it.

but,how to get a SRAM section without initialize in K312?

or how can i pass some information from boot to app not used dataflash?

 

 

 

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Reyna_pan45,

1.

You can use the Power_Ip RTD driver to trigger a funcional reset to see if the ECC initialization is skipped. Also, you can implement this on your new section only.

2.

I don't know if there is any issue with the MPU.

Anyway, the MPU can be disabled in system.c

3.

I don't understand the question, please elaborate.

 

Regards,

Daniel

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Reyna_pan45,

Have a look at the default linker_flash_s32k312.ld and startup_cm7.s, the SRAM ECC is initialized up to __INT_SRAM_END which is ORIGIN(ram_rsvd2). You placed the new section behind that, so it is not initialized.

danielmartynek_0-1726581151292.png

Before the memory can be read, its ECC must be initialized.

It can be initialized later, but it must be a 64bit write.

danielmartynek_1-1726581439837.png

 

The SRAM is retain through functional system reset only.

The bootloader / application can check the source of the reset and skip the ECC initialization if needed, this was discussed here: https://community.nxp.com/t5/S32K/SRAM-ECC-Initialization-for-S32K344/m-p/1764143

 

There can be also issues with the MPU that is initialized in system.c

This would result in a MemManage fault exception.

 

Regards,

Daniel

 

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Reyna_pan45
Contributor II

Hi @danielmartynek 

Thank you for your help,I have made modifications to the. s file according to the instructions you provided, and confirmed that the current partition is 0x100, which is a multiple of 64 bits. However, I still encountered a hardware failure

The following are the modifications I made in the. s file:

Reyna_pan45_4-1726690481534.png

Reyna_pan45_2-1726690439909.pngReyna_pan45_3-1726690452945.png

 

Based on the above phenomenon, my question is as follows:
1.Is this modification correct?
2.Can you provide the routine for how to modify and close this fault in the MPU you mentioned?
3.And, after this modification, I found a new issue: it will cause the generated hex file to contain this part of the content. Do you know how to modify this issue?

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Reyna_pan45,

1.

You can use the Power_Ip RTD driver to trigger a funcional reset to see if the ECC initialization is skipped. Also, you can implement this on your new section only.

2.

I don't know if there is any issue with the MPU.

Anyway, the MPU can be disabled in system.c

3.

I don't understand the question, please elaborate.

 

Regards,

Daniel

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Reyna_pan45
Contributor II

Hi @danielmartynek 

 

Thank you for your help !

Problem 3 is caused by my incorrect area definition,

and after your prompt, I have  resolved this issue .

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