Hi Nikunj,
Reset has two type, POR reset and other reset source reset, include reset pin reset.
If it's a POR reset, you'd better keep reset pin low till VDD arrive at 1.8V, 1.54v at least. After that LVD will hold reset signal till 1.8V. After a POR event, amount of time from the point VDD reaches 1.8 V to execution of the first instruction is 300us.

If it's a reset pin reset, reset pin should be hold over 1 bus clock. Reset pin can use filter. Please see 6.2.2.1.1 in reference manual.
To make system stable, you should pull-up reset pin with a 4.7k~10k resistor. And don't connect capacitor to NMI pin.
Regards,
Jing