DDR3 power down (sleep) issue with MPC8569E

[niranjanaradhya]

Hi All,

We have brought MPC8569MDS referance board from Freescale, using it as a referance board and desigend our own MPC8569 custom board.

We are using MPC8569, 1066.667 MHz and 1GB DDR3 module of part No: JM1333KLU-1G Transcend make.

The below are the On-board boot switch configuration in our Custom board:

  1) QE : 01000111  ;In order to make QE to work for 533 MHz

  2) DDR3 : 01110111  ; Setting DDR3 to work at 200MHz

  3) CLK : 10001001  ; Setting CCB to work at 533.33MHz and e500 core 1066.6MHz

  4) I/O : 01110001 

  5) BOOT : 11011111  ; Boot from NOR flash and e500 to boot without waiting for configuration from external master.

  6) AUX : 11110011  ; MPC8569E acts as host processor, CCB freq is more than 333 MHz, Core clk > 1000 MHz

We have used Codewarrior 10.3.3 version to do memory test for DDR3 Module on our Custom board.

Issues we are facing:

If we do the Memory test using by-default Init file (.tcl) provided in the code warrior 10.3.3 directory we were getting below error and Initialization is getting failed and the DDR3 module is going to sleep mode and not waking up, resulting entire board under reset.

     "Failed to resume target process.

       writemem error: writemem.l 0xe0005000 0x010800fe failed."

we observed that "DDR Voltage is droping to zero" since ddr is going to sleep.

so we did following modification to below regsiters to continue memory test:

  1) D-Init bit in "DDR SDRAM Configuration 2" register is cleared

  2) "Write Leveling" and "DDR control driver register" is commented

  Doing Memory test using Code Warrior 10.3.3 following observation were made.

  1) DDR3 is working for 200 MHz but not for 333.33 MHz.

  2) Memory test is failing most of the times especially bus noise test is failing.

Questions:

  1) Could you please tell us whether we need to enable dinit bit in DDR_SDRAM_CFG_2 and write level registers or not?

  If so, what are the changes we need to do inorder to make DDR3 come out of sleep ?

  2) What is the reason for the BUS noise error and memory test failure ?

  3) Could you please tell us the changes in the Init file that we have to make in order to make the DDR3 work for 333.33 MHz.

We have attached the changed Initialize file which is used for our custom board along with this mail.

Thanks in advance

Original Attachment has been moved to: 8569MDS_init_core---Copy.tcl.zip

[Bulat · Accepted solution]

Try to use following settings of the DDR3 registers:

# TIMING_CFG_0	0x00660804
# TIMING_CFG_1	0x6f6b4846
# TIMING_CFG_2	0x0FA8C8CF
# TIMING_CFG_3	0x00020000

# DDR_SDRAM_CFG_2   0x24401040

# DDR_SDRAM_MODE

0x00061421

# DDR_SDRAM_MODE_2   0x00000000

# DDR_SDRAM_INTERVAL  0x0C300100

# DDR_SDRAM_CLK_CNTL   0x02000000

# TIMING_CFG_4	0x00440001
# TIMING_CFG_5	0x00001400

# DDR_ZQ_CNTL	0x0000000
# DDR_WRLVL_CNTL	0x8675F508

# DDRCDR_1   0x00000000

# DDRCDR_2   0x00000000

# DDR_SDRAM_CFG   0xc7000008

These values from the MPC8569MDS. Note, this board uses a SODIMM from Micron, this can be essential assuming write leveling procedure.

[niranjanaradhya]

Hi Bulat,

We have used the above configuration provided, to do memory test using Codewarrior 10.3.3, but we failed.

Ot of "walk on", "Address test" and "bus noise" test's, we have tried to do "Address test" on the memory 0x20000000 - 0x27FFFFFE and failed.

Please see the below logs for tested.

Beginning test ...

--------------------

Performing target initialization ...

...Connected

============================================

Number of Passes: 1

Address Range to Test: 0x20000000 - 0x27FFFFFE

Access Size: Byte

Tests to be run:

      Address Test

Testing will be target based.

  Address to download Test Driver: 0x00002000

============================================

Pass #: 1 Address Test

Downloading Memory Test Driver ...

Failed

Unknown Erorr result code on the target: 0xFFFF0000

Total Number of Memory Failures Detected: 4294967295

   Subtest: Unknown

           Address: 0xFFFFFFFF0000FFFF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFFFF0000 Actual:   0xFFFFFFFF

   Subtest: Unknown

           Address: 0xFFFFFFFF0000FFFF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFFFF0000 Actual:   0xFFFFFFFF

   Subtest: Unknown

           Address: 0xFFFFFFFF000000FF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFFFF0000 Actual:   0xFFFFFF62

   Subtest: Unknown

           Address: 0xFFFFFFFF0000FFFF Expected: 0xFFFFFFFF Actual:   0xFFFF0700

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFFFF0000 Actual:   0xFFFFFFFF

   Subtest: Unknown

           Address: 0xFFFFFFFF0000FFFF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFF000000 Actual:   0xFFFFFFFF

   Subtest: Unknown

           Address: 0xFFFFFFFF0000FFFF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFFFF0000 Actual:   0xFFFFFFFF

   Subtest: Unknown

           Address: 0xFFFFFFFF000000FF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFFFF0000 Actual:   0xFFFFFFFF

   Subtest: Unknown

           Address: 0xFFFFFFFF0000FFFF Expected: 0xFFFFFFFF Actual:   0xFFFF0000

   Subtest: Unknown

           Address: 0xFFFFFFFFFFFF Expected: 0xFF000000 Actual:   0xFFFFFFFF

============================================

Completed Passes: 1

Total Number of Failed Tests:    1

Total Number of Failed Accesses: 4294967295

============================================

Testing Complete

Task Execution finished. Disconnecting ...

Thanks in advance