我看在AN2165中有个描述写的是在MPC8260A中“the MPC8260A (HiP4) and revision C of the MPC8260 can use these values but require an external multiplexer.”是否MPC8280CVVQLDA型号也是如此？
Yes, the MPC8280CVVQLDA supports 11-bit column address via external addess mux, as well as MPC8260A (HiP4).
it supports or must to be？
I do not understand what means "it supports or must to be".
AN2165 is applicable to the MPC8280 as well as to the MPC8260A, including example with "1-Gbyte SDRAM Memory Module".
I mean MPC8280 must support an SDRAM via an external multiplexer?
When we say "an external multiplexer", we mean SDRAM memory with 11-bit column addressing. If SDRAM has 10-bit column addressing (or less), "an external multiplexer" is not required. See sections 4.2 and 4.3 of the AN2165 to feel the difference.
If I use two MT48LC4M32B2 to form 64bit data, connect to the CS1 chip on the 60x BUS. B60x_ADD28 is connected to A0 of SDRAM, B60x_ADD27 is connected to A1 of BDRAM...B60x_ADD16 is connected to A12 of SDRAM, where SDA10 is connected to A10 of SDRAM, and BNKSEL is connected to BA of SDRAM. PSDMR is configured as 0xc24b36a3, OR1 is configured as 0xfe002ec0, BR1 is configured as 0xf0000041, and SIUMCR is configured as 0x0e200000. Is this correct?
Yes, basically it looks correct with one note. "... B60x_ADD16 is connected to A12 of SDRAM.." sounds doubtful, the MT48LC4M32B2 does not have A12 signal, its address MSB is A11.
Please use English in NXP community.
I am now experiencing a problem where the SDRAM base address is 0, writing byte 0xaa (or other data) to the 0 address will automatically change the byte 0x8, 0x10, 0x18 address to the same value as 0xaa. As shown in the figure, can you help me analyze what might be the reason? The board is made with reference to the development board.
Do you have one board or more? Would be helpful in case of SDRAM malfunction.
Do you properly initialize the SDRAM?
As per your BR1 setting, SDRAM base address is 0xf0000000. Why do you test the SDRAM at address 0x0?
There is another identical board, and the problem is the same. The address in the figure is the photo when I configured the SDRAM base address to 0xf0000000. The same problem as the SDRAM base address is configured to zero.
If you read a single word at address 0x8 (or 0x10, 0x18), is result the same as you read 10 words at address 0x0?
What about SDRAM initialization? What is the sequence?
Retrieving data ...