The MPC5777C Reference Manual recommends initializing the eMIOS UC counter (CNT register) to a value between 1 and the period (B register). From MPC5777CRM section 220.127.116.11.14:
When entering OPWFMB mode coming out of GPIO mode, the internal counter value is
not within that range then the B match will not occur causing the channel internal counter
to wrap at the maximum counter value which is 0xff_ffff for a 24-bit counter. After the
counter wrap occurs it returns to 0x1 and resume normal OPWFMB mode operation.
Thus in order to avoid the counter wrap condition make sure its value is within the 0x1 to
B1 register value range when the OPWFMB mode is entered.
The S32DS SDK eMIOS PWM driver does not appear to explicitly set the CNT register during initialization (EMIOS_DRV_PWM_InitMode() and downstream functions). Is this intentional or should the SDK driver be updated to address the reference manual requirement?