iMX7D : SAIx_CLK_ROOT minimum frequency value for SAI (Serial Audio Interface )module

[koichisakagami]

Dear community,
We have been developing our product with iMX7D.

I am checking a Serial Audio Interface.
I hope to get a SAIx_CLK_ROOT minimum frequency value.

In the the Reference Manual IMX7DRM: Table 5-11. Clock Root Table,
it is described that the SAIx_CLK_ROOT MAX frequency value is 67.5 MHz.
But I could not find the  SAIx_CLK_ROOT MIN frequency value .

[Question]
        Could you tell me the SAIx_CLK_ROOT minimum frequency value ?

Best Regards,
       Koichi Sakagami

[Carlos_Musich · Accepted solution]

Hi Kochi,

In Table 5-11. Clock Root Table you can see all the available clock sources for SAI. The input with lowest frequency is 24MHz (000 - OSC_24M).

Then in Figure 5-15. CCM Clock Tree Root Slices you can find that SAIx_CLK_ROOT has a pre-divider and post-divider.

Finally in chapter 5.2.8.10 Target Register (CCM_TARGET_ROOTn) you can se that pre divider is 3 bits and post divider is 6 bits. So you can divide the 24MHz signal by 8 and then by 64 which is 45kHz approximately.

Regards,
Carlos

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