How to configure IMX6Q EIM Burst Synchronous to one BCLK one data?

[navyliang]

Hello all，

      I use EIM to communicate with FPGA by Synchronous Mode, but have problems。

      I  according 《 i.MX 6Dual/6Quad Applications Processor Reference Manual》page 1046  22.8.9 Burst (Synchronous Mode) Write Memory Access Timing -BCD=1

I configure：read/write sync mode ,SWR=SRD=1, WFL=RFL=0,BL=2,PSZ=2

EIM_CS0GCR1=0X31135387

EIM_CSnGCR2=0

EIM_CSnWCR1= (16 << 24) | //WWSC=16

 EIM_CSnWCR2 =0

EIM_CSnRCR1=(16 << 24) | //RWSC=16

EIM_CSnRCR2=0

EIM_WCR=0

EIM_WIAR not configure

EIM_EAR not configure

in driver write：

   u32 buf_test[100] = {0x5001,0x5002,0x5003......}

   __raw_writew(buf_test, EIM_CS0_baseAddr);

But EIM  bus' data(sram_data) not  increase:

so, how i configure eim , when EIM_WAIT valid, one EIM_BCLK write or read one EIM_DATA?

I have been debugging for a long time. please help me, thank you！！

[bipin7301]

Hi @navyliang 

I was also trying to do similar kind of thing but in i.MX7.

Were you able to achieve what you were trying to do ?

Can you please share your understanding/coding details ?

Regards

Bipin Kumar

[igorpadykov]

Hi Navy

please check example on

Sample code to use i.MX6DQ EIM burst access. 

i.MX6 maximum EIM burst length and performance  

Best regards
igor
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[xinhuah]

Hi igorpadykov

    I have the same problem with Navy,the example Sample code to use i.MX6DQ EIM burst access is for IMX53,do you have the sample code for I.MX6DQ?

Thanks.