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How do you properly clear the UART RX FIFO?

Question asked by dave408 on Sep 11, 2015
Latest reply on Sep 18, 2015 by dave408

This *might* be related to my previous post about data corruption / byte ordering in the UART buffer, but I wanted to keep this as a separate, focused question.

 

I am working on a Modbus RTU slave that communicates with the host via RS485.  When I receive a command from the host, I process it and then send back an arbirtrary number of bytes (depending upon the command, according to the Modbus spec).  After sending the response to the host, I am currently under the impression that the data is essentially "echoed" back and ends up in the RX FIFO.

 

I currently flush the RX FIFO immediately after sending the response back to the host to clear any data.  The problem is that if my response is larger than the size of the FIFO (8 bytes since I am using UART0), the data in the FIFO is incorrect (extra byte that is not the 9th byte of the sent response packet) and this screws up the next incoming command, as the first byte should be the modbus slave ID.

 

I used to flush the RX FIFO like this:

 

while( kStatus_UART_Success == UART_DRV_ReceiveDataBlocking( instance, &rxbuff, 1, 100));

 

but thought that this was causing the problem.  I then went to the following code:

 

UART_Type *base = g_uartBase[instance]; UART_HAL_DisableReceiver( base); assert( kStatus_UART_Success == UART_HAL_FlushRxFifo( base)); UART_HAL_EnableReceiver( base);

 

To try to handle the case where the response > 8 bytes, I tried to call this function twice, which did not work.  I then modified the above code to loop until the FIFO was empty:

UART_Type *base = g_uartBase[instance]; while( kStatus_UART_Success == (count = UART_HAL_GetRxDatawordCountInFifo( base)) {      UART_HAL_DisableReceiver( base);      assert( kStatus_UART_Success == UART_HAL_FlushRxFifo( base));      UART_HAL_EnableReceiver( base); }

 

This didn't help.

 

How do you all clear the RX FIFO?

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