Strange problem with multiple frame buffer

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Strange problem with multiple frame buffer

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mail10
Contributor II

We are using the MCUXpresso IDE (V 11.2., SDK 2.8.2, emwin library 6.1) for an IMXRT1062 project (Embedded Artists iMX RT1062 OEM IT module).

When using multiple frame buffers for the display driver, the program abort sometimes the normal processing and runs only in the this routine (in core_cm7.h) which cleans the buffer cache. This could happen after seconds up to many minutes after program start.

With a single frame buffer the program runs fine, but there are some disturbance in the display.

/**
\brief Clean & Invalidate D-Cache
\details Cleans and Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;

SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();

ccsidr = SCB->CCSIDR;

/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);

__DSB();
__ISB();
#endif
}

The frame buffer is located in the SDRAM:

Memory region Used Size Region Size %age Used
BOARD_FLASH: 480560 B 4 MB 11.46%
BOARD_SDRAM: 5603656 B 30 MB 17.81%
NCACHE_REGION: 16440 B 2 MB 0.78%
SRAM_DTC: 0 GB 128 KB 0.00%
SRAM_ITC: 0 GB 128 KB 0.00%
SRAM_OC: 0 GB 768 KB 0.00%


Best regards,

Reiner

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FelipeGarcia
NXP Employee
NXP Employee

Hi Reiner,

We have identified some issues when placing buffers in a cacheable region like OCRAM or SDRAM. To use SDRAM for this you will need to split a non-cacheable region to place the buffers.

Please check the below community document written by a colleague that explains this behavior in detail.

Using NonCached Memory on i.MXRT - NXP Community

Best regards,

Felipe

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FelipeGarcia
NXP Employee
NXP Employee

Hi Reiner,

We have identified some issues when placing buffers in a cacheable region like OCRAM or SDRAM. To use SDRAM for this you will need to split a non-cacheable region to place the buffers.

Please check the below community document written by a colleague that explains this behavior in detail.

Using NonCached Memory on i.MXRT - NXP Community

Best regards,

Felipe

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored. Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

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mail10
Contributor II

Thank you, now the program is running fine.

Best regards,

Reiner

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