SEMC Interface does not apply correct CLK to SDRAM for IMXRT1176

[burhanhagi]

Hi,

I have one SDRAM (IS42S32800G-6BLI) that I am using with IMXRT1176 chip. 

Even though IS42S32800G-6BLI SDRAM supports max 166MHz Clock, I can run it with 221MHz clock or 198MHz clock or smaller than via SEMC Interface.

I tested the scenario with "evkmimxrt1170_semc_cm7" example in SDK 2.14 with MCUXPRESSO IDE.

Attached is the SDRAM clock speed and configuration of SDRAM paramaters. I also attached debugger results to be your sure that I applied the example correctly to my custom board. 

I also tested the same example with EVK-1170, yet it gives the same result. It works every CLK freq greater than its SDRAM chip(W9825G6KH-5I).

I am really confused how SDRAM runs over its maximum speed 166MHz. There must be something wrong. However, I could not figure it out.

[mayliu1]

Hi @burhanhagi 

Thank you for your interest in the NXP MIMXRT product, I would  like to provide service for you.

I recommend using an oscilloscope to directly measure the SEMC clock signal and check its frequency.

Additionally, it is advised to configure the SEMC timing parameters according to the specification  in the datasheet.

Wish it helps you.
If you still have question about it, please kindly let me know.

Wish you a nice day!

Best Regards
MayLiu

[burhanhagi]

Hi @mayliu1 ,

Actually, SEMC timing paramaters has no effect. Changing timing paramaters has no effect in terms of SDRAM working. 

I set all SEMC timing parameters according to the SDRAM’ own datasheet. Later than I realized that SDRAM works with nearly every random SEMC timing parameter value. Whatever values I try to write there, example always run successfully.  Please look at the SEMC timing values difference in configuration attachments between my first post and second post. They are completely different. However, it still keeps running. I think this is unexpected result for me. Is this normal behaviour? 
@mayliu1, If you have any eval board, please try to enter different timing values than the ones in its datasheet and observe the result. Also please try to set its CLK freq higher than SDRAM max CLK speed. You will understand what I mean.

[mayliu1]

Hi @burhanhagi ,

Thanks for your updated information.

I did some tests for you.

I use MIMXRT1170-EVKB board, and SDK demo "evkbmimxrt1170_semc_cm7"

1: When I set the SEMC clock root frequency higher than 200MHz, the following error occurs

I suggest you use an oscilloscope to verify whether the actual SEMC clock frequency on your development board matches your configured settings.

Wish it helps you.
If you still have question about it, please kindly let me know.

Wish you a nice day!

Best Regards
MayLiu

[burhanhagi]

Hi again @mayliu1 ,

I sent you another post today, please do not miss to have a look at it as well in addition to this post.

I performed the SDRAM CLK measurement by oscilloscope.  Attached below there are 2 different short videos. One is SDRAM CLK is adjusted as 264MHz and another video is CLK as 221MHz.

As you noticed in the videos, both are run by success. Also I captured both CLKs with oscilloscope to prove it was set by software.

One other important finding is that as you see in video,  sdram_config structure runs perfectly directly on EVK-MIMXRT1170 eval board. As you see, I used nearly all members of structure with wrong values according to the EVAL BOARD SDRAM datasheet(W9825G6KH-5I).

So how is this possible? SDRAM CLK and Config values does not have any impact on SDRAM workings as you see. I really wonder how it runs well although completely error parameter values? 

One last interesting is that I also measured my custom board SDRAM CLK with oscilloscope. Again even though it is max speed 166MHz according to its datasheet, it runs well with 198MHz clock. I proved it by measuring oscilloscope as well.

[mayliu1]

Hi @burhanhagi ,

Thanks for your patience.

I consulted an expert on this field.

The following is the reply.

I think this is possible.
First, the test code used by the customer is only a very basic test code, so the test may not necessarily fail. If a more complex test code is used for testing, it may not succeed.
Second, I believe that the parameters specified in the SDRAM datasheet, such as frequency/timing, must have a margin. Therefore, for simple tests, it is possible that errors will not occur if the specified parameter range is exceeded appropriately, but once it is applied to more complex scenarios, the probability of error will definitely increase.
It can be recommended that customers use more complex test cases to test.

Best Regards
MayLiu

[burhanhagi]

Hi @mayliu1,

Thank you very much for the feedback.

Actually the given answer is not helpful for me. Do you have any code including more complex test cases? If yes, Is it possible to share with me to make tests directly on MIMXRT1170_EVK board ?

If not recommend any C code, I have found a more comprehensive SDRAM working tester code. Here is the link. https://barrgroup.com/blog/fast-accurate-memory-test-code-c.

What will be expert's comment about above link? Does he mean "more complex test cases" like the above example I linked ? If yes, I will apply and share the results. Again if not, please send me a full detailed SDRAM test cases C Code.

Thanks in advance

Burhan 

[mayliu1]

Hi @burhanhagi ,

Thanks for your patience and understanding.

I got  an answer from the an  internal expert, and get the information that:

question: What will be expert's comment about above link?

Answer: This link may not work well.

The expert suggest you can refer to this link

https://github.com/daniel-thompson/memtester

Additionally, all parameters have a safety margin, passing a normal temperature test does not necessarily guarantee passing under high or low temperature conditions.

Best Regards
MayLiu

[burhanhagi]

Hi @mayliu1

I will measure CLK by oscilloscope tomorrow. Share the scope outputs.

I wonder how you set CLK as 216MHz or 220MHz. As far as I know every CLK speed is not possible to adjust. There are some Clock Sources and Div paramaters for that purpose.

Also what about the other parameters in that Sdram_Config structure? I randomly give different values from its typical values in its datasheet. However it works with any values no matter what I put there? How is this possible? As I know, entering all paramaters values are critically important for SDRAM to work well. 

As I see in your post, you simply write 220MHz to CLK variable? If it is, then I think, it is not true way to set CLK.  So simply writing any value to Clock variable does not point it is set. You tried to adjust 220MHz in wrong place.

I was set it with Mux and Div members inside Clock_Config.c file. You can see the place where I am setting it in my first post attachment.

@mayliu1, in my product, I use intense operations. Since I need to run graphics opearations a little bit quicker and also I stuck with size of SDRAM, I decided to change it with higher capacity and higher speed one. My current SDRAM was 166MHz max speed, and 32MB size. Now I thought to use 200MHz and 64MB one. That is why I am trying to understand.

However during these tests, I see that running faster seems not possible. Because although my SDRAM max speed 166MHz, I can run it as if it were 198MHz. Therefore, seems buying 200MHz speed SDRAM will not improve my graphics. 

[mayliu1]

Hi @burhanhagi 

Thanks for your updated information.

Regarding my previous post and the test verification I did, I now realize that it was not entirely reasonable and does not align with the specifications of the IMXRT176 chip. I apologize for any confusion this may have caused you.

In IMXRT1170RM, it describe that The maximum supported frequency is 200 MHz.

I check SDRAM (IS42S32800G-6BLI) data sheet, it describe that "Clock rate:166/143 MHz"

Therefore, I think you should follow the specifications of the IMXRT1176 and SDRAM chips to configure the SEMC clock.

Best Regards

MayLiu

[burhanhagi]

Hi @mayliu1,

I am already aware of below 3 frequencies of SDRAM. Not new information for me. I say that Whether entering datasheet values or not does not make any difference. That is all what I am trying to explain.

Please look at the below part of my current SDRAM datasheet.

Please look at the below my settings; In first Screenshot, I filled all the parameter values as based on above datasheet. Also please look at how I am setting its clock(166MHz). See below carefully please.

However, here is my SDRAM CLK setting and other structure values that I wrote. Also please look at how I am setting its clock wrongly on purpose(221MHz). Normally, I expect my SDRAM example not works correctly. Because, as you see in below, all settings are intentionally typed as wrong. Even with below incorrect settings, example still runs successfully without error. So how? I do not understand which specifications I follow?

You can type something different values to every member of above structure. And you will see that nearly all settings fits perfect and works successfully. That is why I concludes that following SDRAM datasheet and IMXRT1170 specifications makes no difference in terms of its right working conditions. How?

[burhanhagi]

Please look at below SS;

While my SDRAM clock frequency is set to 221MHz, I changed the structure parameter values randomly for SDRAM configuration. I randomly give numbers to the some of elements of structure. It works every value no matter what value I put there.

Only when I change the .casLatency parameter value from "kSEMC_LatencyThree" to "kSEMC_LatencyTwo", it did not work as I expected. Apart from that; changing any parameter value seems that it takes no effect in this structure, example always works successfully. 

So seemingly, there is some piece of code elsewhere beyond our software control to configure SDRAM at initialization. I could not understand how I manage SDRAM with my own values.