IMXRT1024 Suitable UART Method

[Lukas_Frank]

Hi all,

I am between usage UART_WriteByte and UART_TransferSendNonBlocking. Which one is correct? I want just minimum delay. I know that UART_TransferSendNonBlocking is non-polling method and I will use it with interrupts.

But I see that there is a normal interrupt example in SDK with UART_WriteByte. Can I ensure same performance when I use UART_WriteByte with interrupt method ? Will they be same if I do like that ?

Will it be a polling approach, When I use only UART_WriteByte ?

Will it be a non-polling approach, When I use UART_WriteByte with interrupts?

Thanks and Regards.

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1-) How can I get the received byte count that comes to my FIFO.
-- Please check the RXCOUNT bits.

jeremyzhou_0-1630293250115.png

2-) What is the best way to use polling, interrupt or eDMA?
-- In my opinion, you can choose the interrupt or eDMA way.
Have a great day,
TIC

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[Lukas_Frank]

Hi again Dear @jeremyzhou ,

I've tried that watching that registers in debug mode. But, issue comes like that; I am setting FIFO size with related registers 256 word (despite it is stated as read-only, I am a little bit confused in here. In this question LPUART_FIFO , @danielchen stated it can be configurable) and I am expecting RXCOUNT represents 256 word but it is always being 4 word and decreasing like 3-2-1-0 at the end of transmission.

Why we are not able to watch TX/RXCOUNT as actual FIFO size?

Thanks and Regards.

[jeremyzhou]

Hi,
1) Why we are not able to watch TX/RXCOUNT as actual FIFO size?
-- The FIFO buffer depth is fixed, in another, is not configurable.

Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou ,

Then, what is the actual size of FIFO Buffer Depth ?

Thanks and Regards.

[Lukas_Frank]

Hi Dear @jeremyzhou ,

Could you please reply me? This question was for approval. Will I not be able to set and use my FIFO size as 256 word? Will it be just 4 word as defaultly stated in MIMXRT1024_features.h below?

/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
#define FSL_FEATURE_LPUART_FIFO_SIZEn(x) (4)

Thanks and Regards.

[jeremyzhou · Accepted solution]

Hi,
Thanks for your reply.
The depth of Transmit and Receive buffers are 4-datawords, just like the below figure shows.

jeremyzhou_0-1630896679857.png

Hope this is clear.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou,

Will I not be able to set these depth as 256-word? Is there no possibility?

Lukas_Frank_0-1631000964183.png

Thanks and Regards.

[jeremyzhou]

Hi，
Thanks for your reply.
1) Will I not be able to set these depth as 256-word? Is there no possibility?
-- No, you can't.
Hope this is clear.
Have a great day,
TIC

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[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
To be prudent, I was wondering if you can describe what kind of data the UART will transmit, then I'll share the advice with you to do it.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou,

I will transmit and receive datagram packages between length 70 to 250 words.

I wonder about two topics as follows:

1-) How can I get received byte count that comes to my FIFO.

2-) What is the best way to use polling, interrupt or eDMA? 

Thanks and Regards.