u-boot does not boot

[junya]

Hi, everyone.

I use the custom board with i.mx8mp.

Several custom boards are out there that u-boot will not start up.

The correct log is log 1 and the abnormal log is log 2.

A normal board starts u-boot after u-boot spl is launched.

An abnormal board repeats u-boot spl startup forever.

NAND is used for the boot device and is flashed with uuu.
There is no particular abnormality when writing.
I am also able to skip bad blocks.

What is the problem?

------log1------

U-Boot SPL 2021.04-5.10.35-2.0.0+g3463140881 (Jun 08 2021 - 01:39:44 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 3200MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
SEC0: RNG instantiated
Normal Boot
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x100000, pagesize 0x1000, ivt offset 0x0
NOTICE: BL31: v2.4(release):lf-5.10.35-2.0.0-rc2-0-gec35fef92
NOTICE: BL31: Built : 09:05:55, May 28 2021

U-Boot 2021.04-5.10.35-2.0.0+g3463140881 (Jun 08 2021 - 01:39:44 +0000)

CPU: i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 30C
Reset cause: POR
Model: NXP i.MX8MPlus TARGET board
DRAM: 1 GiB
NAND: 2048 MiB
MMC: FSL_SDHC: 0
Loading Environment from NAND... *** Warning - bad CRC, using default environment

-----------------------

----log2---------

U-Boot SPL 2021.04-5.10.35-2.0.0+g3463140881 (Jun 08 2021 - 01:39:44 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 3200MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
SEC0: RNG instantiated
Normal Boot
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x100000, pagesize 0x1000, ivt offset 0x0

U-Boot SPL 2021.04-5.10.35-2.0.0+g3463140881 (Jun 08 2021 - 01:39:44 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 3200MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
SEC0: RNG instantiated
Normal Boot
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x100000, pagesize 0x1000, ivt offset 0x0

-------------------------------

[joanxie]

log1 and log2 are from the same HW design and same SW boards? if yes how many boards get log1 and how many boards get log2? your information is too limited, suggest that you can create a new case for HW design review to confirm if your HW is correct or not

[junya]

Hi, @joanxie .

Thank you for your reply.

These logs were obtained by writing the same software to boards 1 and 2 with the same hardware design.

Nearly 1,000 units have been mass-produced to date, and two log 2s have been generated. The others are log 1.

[joanxie]

if only 2 of 1000 boards have this issue, I suggest that you can do the ABA test to check if the chip has issue or not

[junya]

Hi @joanxie ,

We tried an ABA test.
Replacing several i.MX8 chips did not resolve the issue. However, replacing the boot device's NAND did solve the problem.
I checked what the differences were. It seems that the skipping of bad blocks when writing the image to NAND is correct, as there were no errors in the logs.
But, I noticed that if a bad block exists in the U-Boot area, it causes an error.
Since there were no errors during the writing to NAND, I feel that when U-Boot is read at boot time, the bad block is also being read, preventing U-Boot from starting up properly.
Do you have any solutions?

uuu：1.5.21

[joanxie]

the root cause is that ROM didn't detect the bad block and skip the bad block, right? for bad block management, you can refer to the enclosed application note, hope helpful for you