You can look into the HEX code of u-boot.imx, for the first 1K structure, the beginning is formatted as below, this header is for uboot-v2009.08, but I think uboot-2013-04 is same, although the code is different, but eventually they will both put a header in front of uboot.bin.
ROM will read first IVT header to identify which mode need to execute, DCD or PLUG, if DCD mode, then where to find the DRAM config data, and after DRAM configured, where to read the reset uboot image and where to put this image, in which DRAM address etc.
The TEXT_BASE is the address of uboot.bin location, I meant where to put this u-boot.bin. Normally it should be the DRAM address and should reserve some space for other utility, such as mem alloc and global data, gd = (gd_t*)(_armboot_start - CFG_MALLOC_LEN - sizeof(gd_t));
So I think the TEXT_BASE should be as least CFG_MALLOC_LEN + sizeof(gd_t) offset from the start of DRAM.
43 ivt_header: .word 0x402000D1 /* Tag=0xD1, Len=0x0020, Ver=0x40 */
44 app_code_jump_v: .word _start
45 reserv1: .word 0x0
46 dcd_ptr: .word dcd_hdr
47 boot_data_ptr: .word boot_data
48 self_ptr: .word ivt_header
49 #ifdef CONFIG_SECURE_BOOT
50 app_code_csf: .word __hab_data
51 #else
52 app_code_csf: .word 0x0
53 #endif
54 reserv2: .word 0x0
55
56 boot_data: .word TEXT_BASE
57 #ifdef CONFIG_SECURE_BOOT
58 image_len: .word __hab_data_end - TEXT_BASE + CONFIG_FLASH_HEADER_OFFSET
59 #else
60 image_len: .word _end_of_copy - TEXT_BASE + CONFIG_FLASH_HEADER_OFFSET
61 #endif
62 plugin: .word 0x0
63
64 #if defined CONFIG_MX6DL_DDR3
65 #if defined CONFIG_DDR_32BIT
66 dcd_hdr: .word 0x40E001D2 /* Tag=0xD2, Len=59*8 + 4 + 4, Ver=0x40 */
67 write_dcd_cmd: .word 0x04DC01CC /* Tag=0xCC, Len=59*8 + 4, Param=0x04 */
