Subject: [PATCH] Remove M7 UART4 to enable SPI
---
arch/arm/dts/imx8mn-550p2-rev4.dts | 34 -------------------------
arch/arm/dts/imx8mn-evk-u-boot.dtsi | 39 -----------------------------
2 files changed, 73 deletions(-)
diff --git a/arch/arm/dts/imx8mn-550p2-rev4.dts b/arch/arm/dts/imx8mn-550p2-rev4.dts
index 90cae733c1..4530e7bfd2 100644
--- a/arch/arm/dts/imx8mn-550p2-rev4.dts
+++ b/arch/arm/dts/imx8mn-550p2-rev4.dts
@@ -8,40 +8,6 @@
/ {
model = "Rivieh 550.2V4";
-
- mcu_rdc {
- compatible = "imx8m,mcu_rdc";
- /* rdc config when MCU starts
- * master
- * SDMA3p --> domain 1
- * SDMA3b --> domian 1
- * SDMA3_SPBA2 --> domian 1
- * peripheral:
- * SAI3 --> Only Domian 1 can access
- * UART4 --> Only Domian 1 can access
- * GPT1 --> Only Domian 1 can access
- * memory:
- * no MRC should be configured when GPU3D is disabled.
- * end.
- */
- start-config = <
- RDC_MDA RDC_MDA_SDMA3p DID1 0x0 0x0
- RDC_MDA RDC_MDA_SDMA3b DID1 0x0 0x0
- RDC_MDA RDC_MDA_SDMA3_SPBA2 DID1 0x0 0x0
- RDC_PDAP RDC_PDAP_SAI3 PDAP_D1_ACCESS 0x0 0x0
- RDC_PDAP RDC_PDAP_UART4 PDAP_D1_ACCESS 0x0 0x0
- RDC_PDAP RDC_PDAP_GPT1 PDAP_D1_ACCESS 0x0 0x0
- 0x0 0x0 0x0 0x0 0x0
- >;
- /* rdc config when MCU stops
- * memory:
- * no MRC should be configured when GPU3D is disabled.
- * end.
- */
- stop-config = <
- 0x0 0x0 0x0 0x0 0x0
- >;
- };
};
&ddrc {
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index 2e2ba3e36e..a29f9f54e6 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -29,45 +29,6 @@
method = "smc";
};
};
- mcu_rdc {
- compatible = "imx8m,mcu_rdc";
- /* rdc config when MCU starts
- * master
- * SDMA3p --> domain 1
- * SDMA3b --> domian 1
- * SDMA3_SPBA2 --> domian 1
- * peripheral:
- * SAI3 --> Only Domian 1 can access
- * UART4 --> Only Domian 1 can access
- * GPT1 --> Only Domian 1 can access
- * memory:
- * TCM --> Only Domian 1 can access (0x7E0000~0x81FFFF)
- * DDR --> Only Domian 1 can access (0x80000000~0x81000000)
- * end.
- */
- start-config = <
- RDC_MDA RDC_MDA_SDMA3p DID1 0x0 0x0
- RDC_MDA RDC_MDA_SDMA3b DID1 0x0 0x0
- RDC_MDA RDC_MDA_SDMA3_SPBA2 DID1 0x0 0x0
- RDC_PDAP RDC_PDAP_SAI3 PDAP_D1_ACCESS 0x0 0x0
- RDC_PDAP RDC_PDAP_UART4 PDAP_D1_ACCESS 0x0 0x0
- RDC_PDAP RDC_PDAP_GPT1 PDAP_D1_ACCESS 0x0 0x0
- RDC_MEM_REGION 26 TCM_START TCM_END MEM_D1_ACCESS
- RDC_MEM_REGION 0 M4_EVK_DDR4_START M4_EVK_DDR4_END MEM_D1_ACCESS
- 0x0 0x0 0x0 0x0 0x0
- >;
- /* rdc config when MCU stops
- * memory:
- * TCM --> domain 0/1 can access (0x7E0000~0x81FFFF)
- * DDR --> domain 0/1 can access (0x80000000~0x81000000)
- * end.
- */
- stop-config = <
- RDC_MEM_REGION 26 TCM_START TCM_END MEM_D0D1_ACCESS
- RDC_MEM_REGION 0 M4_EVK_DDR4_START M4_EVK_DDR4_END MEM_D0D1_ACCESS
- 0x0 0x0 0x0 0x0 0x0
- >;
- };
};
&{/soc@0} {
--
2.38.1