hi i need to read multiple adc channels from ADC1 by using software trigger by below configuration but i am able to read only adc i.e 1st input channel but i couldnt able to read second channel
processor ==> imrt1064
adc pins i want to read ==>
GPIO_AD_B1_10
GPIO_AD_B1_11
GPIO_AD_B1_04
GPIO_AD_B1_05
GPIO_AD_B1_01
GPIO_AD_B1_00
MCUXpresso IDE v11.6.0 [Build 8187] [2022-07-13]
(c) Copyright 2006-2022 NXP
code 2
whats wrong in my code help me out
regards
Sandeep C
Hi @sandeepc
Please review de configuration of the SDK example evkmimxrt1064_adc_12b1msps_sar_polling and replicate it to different channels.
I don't understand why you have &BOARD_ADC1_channels_config[0] on ADC_SetChannelConfig.
Also you can use ConfigTools to do the configuration.
Best Regards, Miguel.
The channel groups are used in a "ping-pong" approach to control the ADC operation. At any point, only one of the channel groups is actively controlling ADC conversions. The channel group 0 is used for both software and hardware trigger modes. Channel groups 1 and greater indicate potentially multiple channel group registers for use only in hardware trigger mode.
None of the channel groups 1 or greater are used for software trigger operation
In software trigger mode as i referred to understand how api actually works i gone through this it says like above https://mcuxpresso.nxp.com/api_doc/dev/721/group__adc__12b1msps__sar.html#ga2036da14750059b15c079e2c...
but in software trigger if i want read the multiple channels how can i retrieve the multiple channels adc results because if configure like below
ADC_SetChannelConfig(ADC1, 0, &BOARD_ADC1_channels_config[0]); ==>IN 6 ADC1
ADC_SetChannelConfig(ADC1, 0, &BOARD_ADC1_channels_config[1]); ==>IN 5 ADC1
data will place in to the base-> r register if i want to read IN 5 ADC1 how can i read because both IN 6 and IN5 has channel group 0 it point to same indexes please can you justify how to difretiate it
i tried like below also
static inline uint32_t ADC_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)
{
assert(channelGroup < (uint32_t)FSL_FEATURE_ADC_CONVERSION_CONTROL_COUNT);
return base->R[channelGroup];
}