The channel groups are used in a "ping-pong" approach to control the ADC operation. At any point, only one of the channel groups is actively controlling ADC conversions. The channel group 0 is used for both software and hardware trigger modes. Channel groups 1 and greater indicate potentially multiple channel group registers for use only in hardware trigger mode.
None of the channel groups 1 or greater are used for software trigger operation
In software trigger mode as i referred to understand how api actually works i gone through this it says like above https://mcuxpresso.nxp.com/api_doc/dev/721/group__adc__12b1msps__sar.html#ga2036da14750059b15c079e2c...
but in software trigger if i want read the multiple channels how can i retrieve the multiple channels adc results because if configure like below
ADC_SetChannelConfig(ADC1, 0, &BOARD_ADC1_channels_config[0]); ==>IN 6 ADC1
ADC_SetChannelConfig(ADC1, 0, &BOARD_ADC1_channels_config[1]); ==>IN 5 ADC1
data will place in to the base-> r register if i want to read IN 5 ADC1 how can i read because both IN 6 and IN5 has channel group 0 it point to same indexes please can you justify how to difretiate it
i tried like below also
/*
* Copyright 2016-2023 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of NXP Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file adc_2_1.c
* @brief Application entry point.
*/
#include <stdio.h>
#include "board.h"
#include "peripherals.h"
#include "pin_mux.h"
#include "clock_config.h"
#include "MIMXRT1064.h"
#include "fsl_debug_console.h"
/* TODO: insert other include files here. */
/* TODO: insert other definitions and declarations here. */
volatile uint32_t g_AdcConversionValue[2],g_AdcConversionValue1;
static int i=0;
/*
* @brief Application entry point.
*/
/* ADC1_IRQn interrupt handler */
void BOARD_ADC1_IRQHANDLER(void)
{
g_AdcConversionValue[i++] = ADC_GetChannelConversionValue(ADC1, 0);
ADC_SetChannelConfig(ADC1, 0, &BOARD_ADC1_channels_config[i]);
if(i == 2)
i=0;
}
int main(void) {
/* Init board hardware. */
BOARD_ConfigMPU();
BOARD_InitBootPins();
BOARD_InitBootClocks();
BOARD_InitBootPeripherals();
#ifndef BOARD_INIT_DEBUG_CONSOLE_PERIPHERAL
/* Init FSL debug console. */
BOARD_InitDebugConsole();
#endif
PRINTF("Hello World\n");
ADC_SetChannelConfig(ADC1, 0, &BOARD_ADC1_channels_config[0]);
/* Force the counter to be placed into memory. */
volatile static int i = 0 ;
/* Enter an infinite loop, just incrementing a counter. */
while(1) {
i++ ;
/* 'Dummy' NOP to allow source level single stepping of
tight while() loop */
__asm volatile ("nop");
}
return 0 ;
}
static inline uint32_t ADC_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)
{
assert(channelGroup < (uint32_t)FSL_FEATURE_ADC_CONVERSION_CONTROL_COUNT);
return base->R[channelGroup];
}
@miguel