I have a big problem. I'm trying to configure the flexspi_nor_config_t qspiflash_config, using the i.MXRT1060, with a Serial Nor Flash : MT25QL512ABB1EW9.
I need to work in DDR an QSPI mode..
After an hard research, I found a lot of information but not always clear. I found, i.e. this post:
Different uP, but same flash.
const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally, // Necessary!!!!
.csHoldTime = 3u,
.csSetupTime = 3u,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_30MHz, // max 80
.sflashA1Size = 64u * 1024u * 1024u,
.deviceModeCfgEnable = 1, //Necessary
.deviceModeSeq.seqNum = 1,
.deviceModeSeq.seqId = 4,
.deviceModeArg= 0x5F,
.controllerMiscOption= 0x40,
//.lutCustomSeqEnable = 1, //To evaluate
.deviceModeType = kDeviceConfigCmdType_QuadEnable,
.lookupTable =
//0xEBh instruction code for FAST READ QUAD I/O
//0xA0h Dummy cycle for Fast Read Quad I/O
//Model MT25QL512ABB1EW9-0SIT
//FLEXSPI_LUT_SEQ(CMD_SDR,FLEXSPI_1PAD,0x06, 0, 0, 0 ), //WR enable
// Read LUTs
[4*CMD_LUT_SEQ_IDX_READ] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_4PAD, 0xED, RADDR_DDR, FLEXSPI_4PAD, 0x18),
[4*CMD_LUT_SEQ_IDX_READ +1] = FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_4PAD, 0x10, READ_DDR, FLEXSPI_4PAD, 0x04),
//[4*CMD_LUT_SEQ_IDX_READ +2] = FLEXSPI_LUT_SEQ(STOP,FLEXSPI_4PAD, 0x00, 0, 0, 0),
// The MODE8_DDR subsequence costs 2 cycles that is part of the whole dummy cycles
//[4*CMD_LUT_SEQ_IDX_READ + 1] = FLEXSPI_LUT_SEQ(MODE8_DDR, FLEXSPI_4PAD, 0x00, DUMMY_DDR, FLEXSPI_4PAD, 8-2),
// [4*CMD_LUT_SEQ_IDX_READ + 2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_4PAD, 0x04, STOP, FLEXSPI_1PAD, 0x00),
// READ STATUS REGISTER
[4*CMD_LUT_SEQ_IDX_READSTATUS] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
[4*CMD_LUT_SEQ_IDX_READSTATUS + 1] = FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x00, 0, 0, 0),
// WRTIE ENABLE
[4*CMD_LUT_SEQ_IDX_WRITEENABLE] = FLEXSPI_LUT_SEQ(CMD_SDR,FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),
// Set Read register
//[4*CMD_LUT_SEQ_IDX_SET_READ_PARAM] = FLEXSPI_LUT_SEQ(CMD_SDR,FLEXSPI_1PAD, 0x63, WRITE_SDR, FLEXSPI_1PAD, 0x01),
//[4*CMD_LUT_SEQ_IDX_SET_READ_PARAM + 1] = FLEXSPI_LUT_SEQ(STOP,FLEXSPI_1PAD, 0x00, 0, 0, 0),
//WRITE REGISTER
[4*NOR_CMD_INDEX_PAGEPROGRAM] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x61 , WRITE_SDR, FLEXSPI_1PAD, 0x01),
[4*NOR_CMD_INDEX_PAGEPROGRAM + 1] = FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x00, 0, 0, 0),
},
},
.serialNorType = 1u, //To evaluate
//Refer datasheet pag.19 memory map MT25QL512ABB1EW9-0SIT
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
};
But it does not work.. if I remove
.deviceModeSeq.seqNum = 1,
.deviceModeSeq.seqId = 4,
It works, but in dual mode and STR.
Datasheet says I have to enable DDR mode and QSPI mode, but something is not working..
What Am I wrong?
Thank you
