Hello,
on an imx93 processor, I configured a clock in the device tree with:
&flexio2 {
assigned-clocks = <&clk IMX93_CLK_FLEXIO2>;
assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
assigned-clock-rates = <80000000>;
status = "okay";
xx {
compatible = "xx,xx";
pinctrl-0 = <&pinctrl_xx>;
pinctrl-names = "default";
clocks = <&clk IMX93_CLK_CCM_CKO1>;
assigned-clocks = <&clk IMX93_CLK_CCM_CKO1>;
assigned-clock-rates = <50000000>;
};
};
Then I confirmed that the clock freq is configured to be 50 MHz from the driver with a call to clk_get_rate().
But the signal frequency I measure is in fact 10 MHz.
Do you know what could cause the issue ?
Best Regards
已解决! 转到解答。
Hello,
The following resource shows how to change DRAM frequency.
It is for Mx8MM but it works on Mx93. clocks are described in sect. Clock Control Module (CCM) Chapter 30 i.mx93 reference manual
in uboot sources one can look at
imx-common\arm\arch - uboot-imx - i.MX U-Boot
in linux one needs to follow clock framework rules:
https://www.kernel.org/doc/Documentation/clk.txt
https://elinux.org/images/b/b8/Elc2013_Clement.pdf
Regards
Hello,
The following resource shows how to change DRAM frequency.
It is for Mx8MM but it works on Mx93. clocks are described in sect. Clock Control Module (CCM) Chapter 30 i.mx93 reference manual
in uboot sources one can look at
imx-common\arm\arch - uboot-imx - i.MX U-Boot
in linux one needs to follow clock framework rules:
https://www.kernel.org/doc/Documentation/clk.txt
https://elinux.org/images/b/b8/Elc2013_Clement.pdf
Regards