imx8ulp m33 flexspi

weiber1991 · ‎04-15-2025

I use the demo of boards/evkmimx8ulp/driver_examples/flexspi/octal/polling_transfer_unify/cm33

to read nor flash manufacturer ID and

flexspi_nor_flash_init return erro , status=kStatus_FLEXSPI_SequenceExecutionTimeout。

SDK info:

<ksdk:manifest xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" id="SDK_2.x_MIMX8UD7xxx08" name="MIMX8UD7xxx08" brief="This is SDK version 24.12.00 manifest file. It describes the content of the MIMX8UD7xxx08 and additional settings for tools that support SDK version 24.12.00" format_version="3.15" api_version="2.0.0" configuration="bfc65bba44094a9ec982e114485cebdd" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd http://nxp.com/mcuxpresso/sdk/sdk_manifest_v3.15.xsd">

Zhiming_Liu · ‎04-16-2025

Hello,

Are you using Linux while testing this demo, please stop in uboot. There is a note in demo readme.

Please note this application can't support running with Linux BSP!

Best Regards,
Zhiming

weiber1991 · ‎04-16-2025

I do it and return error.
FLEXSPI example started!
Init Flash failure !
ASSERT ERROR " false ": file "boards/evkmimx8ulp/driver_examples/flexspi/octal/polling_transfer_unify/flexspi_octal_polling_transfer_unify.c" Line "91" function name "main"

Zhiming_Liu · ‎04-16-2025

Hello,

Please flash the image contains M33 image. The image i use is flash_singleboot_m33

FLEXSPI example started!
JEDEC id bytes: c8, 68, 19
Erasing Serial NOR over FlexSPI...
Erase data - successfully.
Program data - successfully.

Best Regards,
Zhiming

weiber1991 · ‎04-17-2025

I did it this way.

Our board has some differences from the EVK. Could you help check if the configuration is correct?

my configuration

void BOARD_InitPins(void) { /*!< Function assigned for the core: Cortex-M33[cm33] */

IOMUXC_SetPinMux(IOMUXC_PTA10_LPUART1_TX, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTA10_LPUART1_TX,

IOMUXC_PCR_PE_MASK |

IOMUXC_PCR_PS_MASK);

IOMUXC_SetPinMux(IOMUXC_PTA11_LPUART1_RX, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTA11_LPUART1_RX,

IOMUXC_PCR_PE_MASK |

IOMUXC_PCR_PS_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC0_FLEXSPI0_A_DQS, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC0_FLEXSPI0_A_DQS,

IOMUXC_PCR_DSE_MASK |

IOMUXC_PCR_PE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC1_FLEXSPI0_A_DATA7, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC1_FLEXSPI0_A_DATA7,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC10_FLEXSPI0_A_DATA0, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC10_FLEXSPI0_A_DATA0,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC2_FLEXSPI0_A_DATA6, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC2_FLEXSPI0_A_DATA6,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC3_FLEXSPI0_A_DATA5, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC3_FLEXSPI0_A_DATA5,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC4_FLEXSPI0_A_DATA4, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC4_FLEXSPI0_A_DATA4,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC5_FLEXSPI0_A_SS0_B, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC5_FLEXSPI0_A_SS0_B,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC6_FLEXSPI0_A_SCLK, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC6_FLEXSPI0_A_SCLK,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC7_FLEXSPI0_A_DATA3, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC7_FLEXSPI0_A_DATA3,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC8_FLEXSPI0_A_DATA2, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC8_FLEXSPI0_A_DATA2,

IOMUXC_PCR_DSE_MASK);

IOMUXC_SetPinMux(IOMUXC_PTC9_FLEXSPI0_A_DATA1, 0U);

IOMUXC_SetPinConfig(IOMUXC_PTC9_FLEXSPI0_A_DATA1,

IOMUXC_PCR_DSE_MASK);

}

schematic

Zhiming_Liu · ‎04-17-2025

Hello,

SDK setting is for 8pad flash, but you have 4 pad, need to delete other pads in pinmux.

nor_flash_adesto.c, cm33/nor_flash_common.c, cm33/nor_flash_gigadevice.c and cm33/nor_flash_macronix.c are for different flash device. You need to add similiar here for your flash. Need to add your flash code in flexspi_nor_enable_octal_mode and flexspi_nor_flash_init etc...

status_t flexspi_nor_enable_octal_mode(FLEXSPI_Type *base)
{
    status_t status = kStatus_Success;
    /*
     * Copy LUT information from flash region into RAM region, because flash boot mode maybe not same with application's
     * required mode.
     * If yes, doesn't need to memory copy operation; if no, need to memory opeation before flash access failure due to
     * mismatch LUT read command sequence.
     */
#if defined(CACHE_MAINTAIN) && CACHE_MAINTAIN
    flexspi_cache_status_t cacheStatus;
    flexspi_nor_disable_cache(&cacheStatus);
#endif

    if (flash_state.ioMode != SPINOR_OPI_MODE) /* When flash is not in OPI Mode */
    {
        switch (flash_state.manufacturerId) /* Manufacturer ID */
        {
#if FLASH_ADESTO_DEVICE_ATXP032
            case (SNOR_MFR_ADESTO):
            {
                status = flexspi_nor_enable_octal_for_adesto(base);
                if (status != kStatus_Success)
                {
                    return status;	
                }
            }
            break;
#endif
#if FLASH_GIGADEVICE_DEVICE_GD25LX256
            case (SNOR_MFR_GIGADEVICE):
            {
                status = flexspi_nor_enable_octal_for_gigadevice(base);
                if (status != kStatus_Success)
                {
                    return status;	
                }
            }
            break;
#endif
#if FLASH_MACRONIX_DEVICE_MX25UM51345G
            case (SNOR_MFR_MACRONIX):
            {
                status = flexspi_nor_enable_octal_for_macronix(base);
                if (status != kStatus_Success)
                {
                    return status;	
                }
            }
            break;
#endif
            default:
                assert(false); /* Not support the nor flash */
                break;
        }

    }

Best Regards,
Zhiming