imx6qdl time interval at SCLK.

[dahyunkim]

Hello, 

I had a problem in imx6qdl and I have to reduce the interval of the SCLK(spi clock).

Actually, I have to get no interval in spi clock like this.(Yello is SCLK)

But i.mx6qdl SCLK is like this.

There is 1us interval time. I use 4.5Mhz spi transfer speed.

I am wondering the way can modify the interval of the spi clock.

Do you know the way control of the spi clock?

Is the interval time related in Clock Controller Module? 

Thank you.

[igorpadykov · Accepted solution]

Hi Dahyun

>I am wondering the way can modify the interval of the spi clock.

>Do you know the way control of the spi clock?

interval is caused by processor internal buses delays and can not be changed, sorry.

>Is the interval time related in Clock Controller Module? 

no

Best regards
igor
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