iMX93 LPDDR4x config

[andyclayton]

I have a custom iMx93 board with 16Gb LPDDR4x fitted (single rank) which works fine, however when I try to use a dual rank LPDDR4x device on the same board the DDR config tool fails the firmware init tests, just hanging on the following command (mw 204B2BB8,1). The board is routed for 2 CS signals and 2 CKE signals for the two ranks. The LPDDR4X part I am having problems with is JSC JSL4BAG167ZAMF-05A, the Micron alternative (MT53E1G16D1FW-046 AIT:A) works fine so I know the layout is good.

[yrj]

HI @andyclayton 

     1.May I ask if you successfully transplanted JSL4BAG167ZAMF, and if you could share your experience?

[Rita_Wang]

Dual rank single channel devices are supported therefore, 16Gb/2GB density can be also achieved by using a dual rank single channel device with 16-row addresses (R0 - R15).

Have you configurate the LPRRD4X proper, you can share your configuration to us first.

[andyclayton]

Configuration attached. I've also tried single rank 8Gb/1GB settings as well.

[andyclayton]

Here's the debug output from the config tool :-

#################### Result for: phy_init ###### Run 1 #############################################Microsoft Windows [Version 10.0.26100.4652]

(c) Microsoft Corporation. All rights reserved.

C:\nxp\i.MX_CFG_25.03\bin>prompt test-prefix :

test-prefix : "C:/nxp/i.MX_CFG_25.03/bin/python3/python" "C:/nxp/i.MX_CFG_25.03/bin/python3/memtool/memtool_entry.py" -t "runtest" -d "C:/ProgramData/NXP/mcu_data_25.03/processors/MIMX9332xxxxM/ksdk2_0/mem_validation/ddrc" -p "C:/Users/andyc/AppData/Local/Temp/mem_validation/phy_training_phy_test_0_0_.log" -l DEBUG "C:/Users/andyc/AppData/Local/Temp/mem_validation/connect.json" "C:/Users/andyc/AppData/Local/Temp/mem_validation/test.json" "C:/Users/andyc/AppData/Local/Temp/mem_validation/phy.json" "C:/Users/andyc/AppData/Local/Temp/mem_validation/ddrc_registers.json" "C:/Users/andyc/AppData/Local/Temp/mem_validation/ddrc_config.json" "C:/Users/andyc/AppData/Local/Temp/mem_validation/ddrc_config_in.json"

INFO memtool.utils.helper *****C:/Users/andyc/AppData/Local/Temp/mem_validation/connect.json

INFO memtool.utils.helper *****C:/Users/andyc/AppData/Local/Temp/mem_validation/test.json

INFO memtool.utils.helper *****C:/Users/andyc/AppData/Local/Temp/mem_validation/phy.json

INFO memtool.utils.helper *****C:/Users/andyc/AppData/Local/Temp/mem_validation/ddrc_registers.json

INFO memtool.utils.helper *****C:/Users/andyc/AppData/Local/Temp/mem_validation/ddrc_config.json

INFO memtool.utils.helper *****C:/Users/andyc/AppData/Local/Temp/mem_validation/ddrc_config_in.json

DEBUG memtool.common.factories new instance -> {inst}

INFO memtool.processor.imx9.imx9_processor Xls mapping load time 0.010644

DEBUG memtool.rpa.xls_engine_mx9 Set Register Configuration!E8 to Disable

INFO memtool.processor.imx9.imx9_processor Config time 0.000295

INFO memtool.processor.imx9.imx9_processor DS file time 0.215430

DEBUG memtool.processor.imx9.imx9_processor freq_0 set to 3200

INFO memtool.phyinit.phy_init Run phyinit for 2022.01\lpddr4x

DEBUG memtool.phyinit.phy_init Shared library C:\ProgramData\NXP\mcu_data_25.03\processors\MIMX9332xxxxM\ksdk2_0\mem_validation\ddrc\phyinit\sharedlib\phyinit_2022.01_lpddr4x.dll

DEBUG memtool.common.factories new instance -> {inst}

DEBUG memtool.phyinit.phy_init PHY config file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_config_final.json

DEBUG memtool.phyinit.phy_init Phyinit output file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_training_out_1d2d.txt

DEBUG memtool.phyinit.phy_init Retention output file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_training_out_1d2d_retention.txt

DEBUG memtool.phyinit.out_parser Parse phyinit output file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_training_out_1d2d.txt

DEBUG memtool.phyinit.out_parser Parse retention output file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_training_out_1d2d_retention.txt

DEBUG memtool.phyinit.out_parser Parse state A_BRING_UP_POWER

DEBUG memtool.phyinit.out_parser Parse state C_PHY_INIT_CONFIG(307)

DEBUG memtool.phyinit.out_parser Write PHY CONFIG as txt size 0x20fc to file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_init.c

DEBUG memtool.phyinit.out_parser Write PHY CONFIG as txt size 0xda5 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\phy_init.json

DEBUG memtool.phyinit.out_parser Parse state LOAD_IMEM_1(468)

DEBUG memtool.phyinit.out_parser Parse state D_LOAD_IMEM_1D(488)

DEBUG memtool.phyinit.out_parser Write IMEM 1D as bin size 0x8000 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\imem_1d.bin

DEBUG memtool.phyinit.out_parser Write IMEM 1D as txt size 0x6eb52 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\imem_1d.txt

DEBUG memtool.phyinit.out_parser Parse state PHASE.E_SET_DFI_CLOCK(16873)

DEBUG memtool.phyinit.out_parser Parse state PHASE.F_LOAD_DMEM_1(16892)

DEBUG memtool.phyinit.out_parser Parse state PHASE.F_LOAD_DMEM_1D(16908)

DEBUG memtool.phyinit.out_parser Write DMEM 1D as bin size 0x67c to file C:\Users\andyc\AppData\Local\Temp\mem_validation\dmem_1d.bin

DEBUG memtool.phyinit.out_parser Write DMEM 1D as txt size 0x5394 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\dmem_1d.txt

DEBUG memtool.phyinit.out_parser Parse state PHASE.G_EXEC_FW(17739)

DEBUG memtool.phyinit.out_parser Parse state PHASE.E_SET_DFI_CLOCK(17815)

DEBUG memtool.phyinit.out_parser Parse state PHASE.D_LOAD_IMEM_2(17819)

DEBUG memtool.phyinit.out_parser Parse state PHASE.D_LOAD_IMEM_2D(17837)

DEBUG memtool.phyinit.out_parser Write IMEM 2D as txt size 0x6c68b to file C:\Users\andyc\AppData\Local\Temp\mem_validation\imem_2d.txt

DEBUG memtool.phyinit.out_parser Write IMEM 2D as bin size 0x8000 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\imem_2d.bin

DEBUG memtool.phyinit.out_parser Parse state PHASE.PHASE.F_LOAD_DMEM_2(34222)

DEBUG memtool.phyinit.out_parser Parse state PHASE.D_LOAD_DMEM_2D(34243)

DEBUG memtool.phyinit.out_parser Write DMEM 2D as bin size 0x580 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\dmem_2d.bin

DEBUG memtool.phyinit.out_parser Write DMEM 2D as txt size 0x460a to file C:\Users\andyc\AppData\Local\Temp\mem_validation\dmem_2d.txt

DEBUG memtool.phyinit.out_parser Parse state PHASE.PHASE.G_EXEC_FW(34948)

DEBUG memtool.phyinit.out_parser Parse state PHASE.PHASE.I_LOAD_PIE(35014)

DEBUG memtool.phyinit.out_parser Write PIE as txt size 0x42c3 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\pie.txt

DEBUG memtool.phyinit.out_parser Write PIE as txt size 0x8d02 to file C:\Users\andyc\AppData\Local\Temp\mem_validation\pie.json

DEBUG memtool.phyinit.out_parser Parse state PHASE.H_READ_MSG_BLOCK(35597)

DEBUG memtool.phyinit.out_parser Parse retention register list

INFO memtool.comm.serial_channel Using serial: COM9

DEBUG memtool.common.factories new instance -> {inst}

DEBUG memtool.common.factories new instance -> {inst}

DEBUG memtool.common.factories new instance -> {inst}

DEBUG memtool.comm.serial_channel Channel is not alive

DEBUG spsdk.utils.interfaces.device.usb_device Closing the Interface: OO Blank 93 (0x1FC9, 0x014E)path=b'\\\\?\\hid#vid_1fc9&pid_014e#6&13db141b&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}' sn=''

DEBUG memtool.comm.serial_channel ==================hardware_init=======================

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel Power up ddr...

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel DDRMIX power on done...

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel DDRPHY coldreset...

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel Reset and configure LPI2C...

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel ********Found PMIC PCA945X**********

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel Set VDDQ to 0.6V for LPDDR4X

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel ==================hardware_init exit==================

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel

DEBUG memtool.comm.serial_channel Channel is alive

DEBUG memtool.comm.serial_channel Executing: mw204B2BB8,1

[andyclayton · Accepted solution]

Found the problem, the serial port was dying during the test.

[Rita_Wang]

Good new and good job!

[andyclayton]

I now have half the memory working (1GB) by reducing the DDR speed to 3200. If I set the number of ranks to 1 and the memory size the 8Gb then the DDR config tests all pass. If I set the ranks to 2 then the tests start failing.