iMX6SoloX documentation questions

[alevyzebra]

Hi.  I have several questions regarding the LCDIF section of Freescale document IMX6SXRM.

- Table 37-2 (eLCDIF Clocks) is empty.  Clearly there are clocks required for this component, what should be in the table?

- The PANIC section in the "LCDIFx_THRES field descriptions" is empty.  I think this is what is being described in section 37.4.1.2, but the example there also contains typos.  For instance, it says "To set the panic output when 3/4s of the LFIFO is empty, set the LCDIF_THRES_PANIC value to 3/4 * 512, or 128."   I think what was meant to be written was "1/4 * 512," correct?

- Some of the LCDIF registers (e.g. LCDIFx_RLn, LCDIFx_CTRL1n, and LCDIFx_CTRL2n) indicate their addresses as "Base address + 0h offset + (4d x i) where i=0d to 3d."  Is the following correct?

   - i = 0 refers to using the "general" LCDIFx_RL register

   - i = 1 refers to using the LCDIFx_RL_SET register

   - i = 2 refers to using the LCDIFx_RL_CLR register, and

   - i = 3 refers to using the LCDIFx_RL_TOG

Thanks,

Alex

[art]

Q. Table 37-2 (eLCDIF Clocks) is empty. Clearly there are clocks required for this component, what should be in the table?

A. The data for this table will be added in the next document release.

Q. I think what was meant to be written was "1/4 * 512," correct?

A. Yes, this is correct.

Q. Some of the LCDIF registers (e.g. LCDIFx_RLn, LCDIFx_CTRL1n, and LCDIFx_CTRL2n) indicate their addresses as "Base address + 0h offset + (4d x i) where i=0d to 3d."  Is the following correct?

  - i = 0 refers to using the "general" LCDIFx_RL register

  - i = 1 refers to using the LCDIFx_RL_SET register

  - i = 2 refers to using the LCDIFx_RL_CLR register, and

  - i = 3 refers to using the LCDIFx_RL_TOG

A. Yes, this is correct.

Have a great day,
Artur

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[alevyzebra]

Additionally, I'm now looking at the timing parameters on the LCDIF.  The LCDIFx_TIMING field descriptions (section 37.6.7) reference signals that don't seem to be listed in the timing diagram in figure 37-11.  What are the DCn and CEn signals?  I'm assuming the CEn is the chip select (LCD_CS) signal, but what is the DCn signal?  My best guess is LCD_WR_RWn, but I'm not sure about that.

Thanks,

Alex

[alevyzebra]

Thanks for your reply, Artur.  Can you expand on what should be in table 37-2?

-Alex

[art]

There should be the information on the module's clocks connection within the chip.

Have a great day,
Artur