iMX6SDL behaviour before POR

[mosmos]

Hello,

the "Out of reset condition" for GPIO_17 (i.MX6 SDL) is "ALT5 gpio7.GPIO[12] Input 100k pullup".

Is there any documentation for the behaviour of this pin while being in reset-state? (before the PMIC pulls POR high while power-up)

We need this signal as an active-low GPIO-pin, so it must be high in reset-state

[igorpadykov · Accepted solution]

Hi Manuel

assumed that in reset-state the same as after, except:

Table 101. Signals with Differing Before Reset and After Reset States  IMX6SDLCEC

Best regards

igor

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