Fabio,
Thanks for the response. I've seen that in the imx51-babbage.dts file, but I'm still confused. In the kernel source, under Documentation/devicetree/bindings/gpio, I see the following in gpio-mxs.txt:
As the GPIO controller is embedded in the PIN controller and all the
GPIO ports share the same IO space with PIN controller, the GPIO node
will be represented as sub-nodes of MXS pinctrl node.
Required properties for GPIO node:
- compatible : Should be "fsl,<soc>-gpio". The supported SoCs include
imx23 and imx28.
- interrupts : Should be the port interrupt shared by all 32 pins.
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be two. The first cell is the pin number and
the second cell is used to specify the gpio polarity:
0 = active high
1 = active low
- interrupt-controller: Marks the device node as an interrupt controller.
- #interrupt-cells : Should be 2. The first cell is the GPIO number.
The second cell bits[3:0] is used to specify trigger type and level flags:
1 = low-to-high edge triggered.
2 = high-to-low edge triggered.
4 = active high level-sensitive.
8 = active low level-sensitive.
Note: Each GPIO port should have an alias correctly numbered in "aliases"
node.
Then in the imx28.dtsi I see the definitions of the aliases and GPIO ports, for example...
gpio0: gpio@0 {
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
interrupts = <127>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
I don't see how I should define a node in the imx28-evk.dts that defines a GPIO that is an IRQ. The "interrupts" in the dtsi file, 127 in the example above, refer to the IRQ source in the ICOLL. Where are the definitions of the interrupt-cells and gpio-cells at that are described in the gpio-mxs.txt documentation?
Thanks,
Ryan
