i.Mx8ULP: Boundary Scan Failing when code not Loaded

[ericaverill]

I'm attempting to use boundary scan with the i.Mx8ULP and have found that it does not appear to work correctly when code is not loaded and running in the (A35) processor. Specifically, the tools do not detect the correct boundary scan register length without an image downloaded and running.

If I start with a "new" PWB (boot mode 0b00, no ULP fuses blown, blank eMMC boot device), or if I force the ULP into serial download mode by setting boot mode to 0b01 and I try to run boundary scan testing I get the following error from the boundary scan tool:

Boundary-Scan Register Test: Failed

Boundary-Scan Register length detected for
device U1 is 126 bits shorter than the length
specified in BSDL file.

U1 (BGA485)
ACT: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC0002B3C0000000000300000000000000000000EAA0000000000000000000000000000000000000000
EXP: 0FFFF0000ACF0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
MSK: 0FFFFFFFFFFFF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000

If I download code to the ULP (I've been able to do this successfully using our customer image or by downloading the DDR calibration image via the NXP IMX DDR Tool) then this same test passes, and the behavior and results are very consistent. Note that other JTAG tests (e.g. reading the IDCODE register) still pass in the failing case so I do not believe it's an issue with the physical JTAG connection.

With the i.Mx8ULP are there specific things that need to be powered or enabled for boundary scan to work correctly?

[JosephAtNXP]

Hi,

Thank you for your interest in NXP Semiconductor products,

Could you please review that you have the correct file downloaded? After trying to download each 8ULP BSDL, I noticed that the files are inverted, e.g. BSDL File for i.MX 8ULP (15x15 package) contains imx8ulp_fccsp512_full.bsdl and the file has these headers.

--
-- Boundary Scan Description Language (BSDL) File
-- Generated by Viper version: 2020.12.14 at: Fri Feb 12 10:30:35 2021
--
-- Device: FCCSP512
-- Package Type: MAPBGA_9x9
--

Regards

[ericaverill]

Yes, I can confirm that I have the correct BSDL files. I did notice that the two files on the website appear to be reversed and I grabbed the correct one for my application.

I've continued to have some issues: Even after loading code I can pass our "infrastructure" test (reading IDCODE register and scan register length) but at some point when running interconnect test vectors the device seems to get back into the state where the boundary scan register is incorrect and the test can no longer continue. I've confirmed that the reset (RESET0_N) signal is not being asserted, the clock remains stable and all power supplies that I've checked out stay up.

[bajackson]

Hi Erica, I am having the same issue currently with the i.Mx8ULP. Did you ever find a solution, it looks like this thread never got resolved.

[ericaverill]

I have been continuing to work this issue as a background task as it's not critical for what I've been doing, but, I did determine that there are some writes to registers that must be completed to make things work. This is eluded to in the reference manual sections 78.2.2 and 78.3.5.7 which talk about a "test control register" (but does not really provide much detail about what this register does or how you're supposed to use it). I found that writing 0x04 to the test control register, delaying 100ms, writing 0x07 to the same register, then delaying another 100ms before continuing with any operations that interact with the boundary scan data register seemed to allow things to work.

I sent this information off to my FAE, who let me know that they had submitted it to the design team for confirmation but it's been over a month now and I haven't heard anything back. Given the limited information in the RM I wanted to ensure that this was the correct sequence to ensure things work correctly.

[bajackson]

Just in case anyone else runs into this issue, I can confirm that this is the correct solution. I was able to fix my implementation by following these steps. This is also outlined in the IMX8ULP reference manual on page 5687.

[JosephAtNXP]

Hi,

Could you share your schematics to review them?

Is it reproducible on EVK?

Regards,