i.MX6SDL register access time.

[satoshishimoda]

Hi community,

We have some questions about i.MX6SDL register access

Please see our questions as below.

[Q1]

Would you let me know what clock is used to access (read/write) a peripheral register?

(e.g. eCSPI, EIM, etc...)

I feel ipg_clk_root is used, right?

[Q2]

Would you let me knwo how log clock cycle is needed to access a peripheral register?

Best Regards,

Satoshi Shimoda

[igorpadykov · Accepted solution]

Hi Satoshi

access time is described in sect.13.1.1 Features  IMX6SDLRM

Peripheral read transactions require a minimum of 2 hclk clocks, and unbuffered

write transactions require a minimum of 3 hclk clocks.

clocks shown on Table 13-1. AIPSTZ Clocks

Best regards

igor

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