i.MX6 RGMII RX registers configuration

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i.MX6 RGMII RX registers configuration

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hiteshviradiya
Contributor I

Dear NXP Team,

We are using IMX6Q SoC in our custom product where we connected IMX6 FEC to one of the port of the Ethernet switch from Marvell. Reference clock for the i.MX6 can be configure either from external oscillator (125Mhz) or via Marvell Port-6 GPIO-5. Both ports (i.MX6 and Marvell (Port-6) switch) working at 2.5V.

Current issue

We are having CRC error lost at RX side of the i.MX6 with 1G configuration. We tried to change clock TX and RX timing via Marvell Physical Control register without any success. So we want to play with RGMII Rx on FEC of IMX6

I saw in IMX6Q data sheet and found of page#90 Figure 55: RGMII Receive Signal Timing Diagram with Internal Delay
See below image:

Screenshot from 2017-11-24 15_53_23.png
We want to try this for 1G Ethernet issue.

Where do I find this configurations?

I checked IMX6DQRM_Processor Reference Manual.pdf but I didn't found this configurations.

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Thanks,

Hitesh

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Hitesh

there is no control on-chip to adjust the delay between these signals. A delay would need to be

implemented at the board level. According to footnote2 to sect.4.12.5.3 RGMII Signal Switching

Specifications i.MX6DQ Datasheet :

"For all versions of RGMII prior to 2.0; This implies that PC board design will require clocks to be routed such

that an additional delay of greater than 1.2 ns and less than 1.7 ns will be added to the associated clock signal."

http://www.nxp.com/docs/en/data-sheet/IMX6DQCEC.pdf

Best regards
igor
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hiteshviradiya
Contributor I

Thanks Igor for the prompt response!

We know the IMX FEC Rx errata but on our custom board we are just testing 100-200 Mbps throughput with 1G connectivity and we saw errors or packet drop using iperf.

When we set socket size to very small we don't see errors but it limits the BW up to ~210-215 Mbps using below commands:

On board: iperf -s -u -i 1 -w 3400

On PC: iperf -u -c 192.168.1.11 -i 1 -t 20 -b 1000M -w 3400

But if we increase this socket size to more, say 5000 we start getting RX errors or dropped packets (and throughput gets increased to ~300 Mbps).

Any idea why?

On wand board it is working fine & on our board we saw this issue. Baseline uboot/kernel is taken from wandboard and in hardware we have marvell switch's Port#6 is connected to IMX6 FEC.

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Thanks,

Hitesh

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi

there still may be timings issue, as if timings are marginal, additional noise

from large packets may cause data loss.

Best regards
igor

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hiteshviradiya
Contributor I

Hi Igor,

What do you mean by timing issue?

Do we need to configure something in software (FEC registers, If Yes,

which registers to play with)?

Or Do we need to do something in hardware?

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Thanks,

Hitesh

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Hitesh

I meant timing may not conform sect.4.12.5.3 RGMII Signal Switching Specifications i.MX6DQ Datasheet :

"For all versions of RGMII prior to 2.0; This implies that PC board design will require clocks to be routed such

that an additional delay of greater than 1.2 ns and less than 1.7 ns will be added to the associated clock signal."

Best regards
igor

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hiteshviradiya
Contributor I

Dear Igor,

See below snapshots of
1. RGMII RXD0 RX CLK fall at IMX side
2. RGMII CLK RX DX0 1.5n raise at IMX side
3&4. rgmii clk rd0 at imx6 sides

These signals are output from Marvell Switch 88E6176 toward iMX receive port. Do you see any issues with this timings?
Waiting for your response!


Thanks,
Hitesh

RGMII_RXD0_RX-CLK_fall_at_IMX_side.bmpRGMII_CLK_RX_DX0_1.5n_raise_at_IMX_side.bmprgmii clk_rd0_at_imx6 side2.bmprgmii clk_rd0_at_imx6 side.bmp

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igorpadykov
NXP TechSupport
NXP TechSupport

for dropped packets one can look at

About Gigabit Ethernet performance gap between Android&Linux 

Best regards
igor

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hiteshviradiya
Contributor I

Hi Igor,

I tried all the suggestions given on that link but sadly it didn't solved our problem. Our problem is not only the dropped packets but also errors (mostly CRC errors).

Any more recommendations are deeply appreciated?

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Thanks,

Hitesh

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igorpadykov
NXP TechSupport
NXP TechSupport
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hiteshviradiya
Contributor I

Hi Igor,

We tried removing 33R resistor from ENET REF CLK line but doesn't helped too !

Any more suggestions?

We are really stuck with this issue. It's ok to have less throughput ~200-300 but we are getting CRC errors and dropped count gets increased regularly (in ifconfig eth0 command) when we test using iperf. And this doesn't happened on Wandboard.

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Thanks,

Hitesh

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