how to use ldb/lvds in android8 of imx8mq ?

[jiangyaqiang]

Hi  anyone:

   Is there any document about how to use lvds in android8 of imx8mq platform ?

Best Regards.

[lswdneil]

Hi, Jiang:

    Thank you for  your  sn65dsi84 's  code . I have used it and the  LCD(1920X1080) can  show .   but  met some questions, please see the attched file, 1.) the screen shift to right  2.) the colors have distortion.

  Can you give me some advice?   

thanks.

13534273512

Thomas He.

[hankwang]

Hi Dong,

               Do you have resolved this issue? I have the same issue.

[hankwang]

  The issue fixed.  The dsi parameters must be modified as below :

   The dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS.

[shraddha]

where to find dsi and change this in mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS?
@hankwang 

[jiangyaqiang]

HI：

does you use external clock or dsi clock for sn65dsi clock input ?

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦605

Tel：0755-26037882-616

Mail:yaqiang.jiang@huameishi.com

[hankwang]

HI,  i use dsi clock. My pixel clock is 72Mhz. So i set 432Mhz and Divisor is 6.

[jiangyaqiang]

HI  Hank wang:

          Thanks.

          but in sn65dsi84 datasheet , when use dsi clock as input , the dsi clock must be set as continuous. 

           BTW: have you try other  lcd resolution ?

datasheet:

8.3.1 Clock Configurations and Multipliers
The LVDS clock may be derived from the DSI channel A clock, or from an external reference clock source. When
the MIPI D-PHY channel A HS clock is used as the LVDS clock source, the D-PHY clock lane must operate in
HS free-running (continuous) mode; this feature eliminates the requirement for an external reference clock
reducing system costs

[hankwang]

Hi , I only tested 1920*1080 resolution. But I also have the same issue in another panel (1280*720).But i did not to test. 

Maybe i will test in few days. 

[leemeiyung]

HI Jiang:

   Follow your offered sn65dsi85 driver, I can dispaly 800x600@60Hz while use sn65dsi84 for mipi conver lvds， but encounter an "no singal" tips on another LCD with 1920x1080 resolution， when set CCSR 0x3c as 0x10, I can got the test pattern,  could you remind me what's wrong in the process。

BTW，use the same dts and kernel, I do the blowing test:

1) test pattern with single lvds chanel mode  on a 800x600 lcd -- ok

2) mipidsi show image to lvds single lvds chanel mode  on 800x600 lcd -ok

3) test pattern with dual lvds chanel mode on a 1920x1080 lcd -- ok

4) test pattern witch dual lvds chanel mode (forced in 800x600@60hz) on the 1920x1080 lcd -ok

5) mipi dsi show image to lvds with dual lvds chanel mode (forced in 800x600@60hz) fail, but while connect the 800x600 resolution lcd in one lvds channel, i got the image.

Thanks.

[oliverkuo]

Hi Frank,

I'm also trying to enable sn65dsi84 on our custom board, we use a 1024*600 LVDS panel.

However, the DSI driver can't work out the CM/CN/CO values for D-PHY ref_clk.

Could you share your dts file and timing table of the panel?

imx_nwl_try_phy_speed (583): bit_clk = 403200000 ; pixclock = 50400000

nwl_dsi-imx mipi_dsi@30A00000: [drm:imx_nwl_try_phy_speed] *ERROR* Cannot setup PHY for mode: 1024x600 @50400 kHz

nwl_dsi-imx mipi_dsi@30A00000: [drm:imx_nwl_try_phy_speed] *ERROR* PHY_REF clk: 27000000, bit clk: 403200000

Thanks a lot.

[jiangyaqiang]

HI :

you can turn up the frequency.

For 1024*600 LVDS, I success in kernel 4.9 but fail in 4.14.

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦605

Tel：0755-26037882-616

Mail:yaqiang.jiang@huameishi.com

[merlinthewizard]

Hi Jiang,

I'm trying to add sn65dsi84 to my kernel but I have some trouble with device tree, it is possible to have your entire dts? I'm not very skilled in this stuff yet and I guess I'm making mny errors.

Let me know,

Thanks

[jiangyaqiang]

HI merilin:

It's the same with fsl-imx8mq-evk-dcss-rm67191.dtsi except:

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦605

Tel：0755-26037882-616

Mail:yaqiang.jiang@huameishi.com

[oliverkuo]

Hi,

Thanks for your reply.

I found the algorithm of computing CM/CN/CO was revised in Linux version(4.14.98), I think this issue will be fixed on next release.

[jiangyaqiang]

HI Lee:

Most likely it's the display_timing problem.

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦605

Tel：0755-26037882-616

Mail:yaqiang.jiang@huameishi.com

[念祖姚]

Hi Jiang：

      Thanks for  your  share！    I added  the panel-sn65dsix.c and  panel-dsi85.h   into   my ststem，  and I  encountered such a problem，the  dmesg  indicated that  

the mipi_dsi_bridge  can't   find  the  i2c  client  device  sn65dsi8x.

      I added some  log massages and then i  find  that  the  sn65dsi8x  client_dev->dev.driver  = NULL.    Is  the  sn65dsi8x  need  a   i2c  device driver?,   Have you encountered this  problem?

   My  kernel  log:

   [ 1.052093] [drm] Initialized
   [ 1.061372] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
   [ 1.068015] [drm] No driver support for vblank timestamp query.
   [ 1.074129] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops)
   [ 1.081637] nwl_dsi-imx mipi_dsi@30A00000: Using DCSS as input source
   [ 1.088478] panel-ti-sn65dsi8x 30a00000.mipi_dsi_bridge.0: failed to find client platform device
   [ 1.097285] panel-ti-sn65dsi8x 30a00000.mipi_dsi_bridge.0: Yao-log:client_dev->dev.driver == NULL!!!
   [ 1.106541] nwl-mipi-dsi 30a00000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x813
   [ 1.116450] imx-drm display-subsystem: bound mipi_dsi@30A00000 (ops imx_nwl_dsi_component_ops)
   [ 1.129560] [drm] OPIPE_CFG: gamut = 3, nl = 1, pr = 1, pix_format = 875713089
   [ 1.655077] function:sn65_panel_enable line:1044 -----------
   [ 1.721128] Console: switching to colour frame buffer device 240x67
   [ 1.783389] imx-drm display-subsystem: fb0: frame buffer device

Thanks & Best Regards

  姚念祖 

 Mail：982586047@qq.com

 Address: 武汉市洪山区光谷大道特一号国际企业中心

[jiangyaqiang]

Hi：

It just a simple driver provided i2c client for panel-sn65dsi.c.

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦605

Tel：0755-26037882-616

Mail:yaqiang.jiang@huameishi.com

[venkatesh_selva]

Hi Jiang,

Thanks for the reply. In my case I'm using SN65DSI84 as bridge and auo t21hvn01 for panel. Can you share your changes in fsl-imx8mq-com.dts & fsl-imx8mq-com.dtsi files?

Can I ask you what panel you have used? If the panel is not similar, I guess I need to write drm brdge driver for panel-simple.c

In my so far combinations I couldn't see DSI clock.

Venkatesh

[jiangyaqiang]

HI :

As attachment.

Hope it can help for you.

BTW, some clock doesn't support by imx8mq, you can higher it up a little.

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦605

Tel：0755-26037882-616

Mail:yaqiang.jiang@huameishi.com

[jiangyaqiang]

sorry, I got it, it much convert MIPI to LVDS.