how to mux uart7(null modem)

[wangjia]

pinctrl_uart7: uart7grp {

                        fsl,pins = <

                              MX6UL_PAD_ENET2_RX_EN__UART7_DCE_TX     0x1b0b1

                              MX6UL_PAD_ENET2_TX_DATA0__UART7_DCE_RX  0x1b0b1

                        > ;

                };

configure like this , and disable the pinctrl_enet2  interface . but no TX our when

i am using the echo "test" >/dev/ttymxc6 .

but opposite the uart6 success like this configure :

pinctrl_uart6: uart6grp {

                        fsl,pins = <

                               MX6UL_PAD_ENET2_RX_DATA0__UART6_DCE_TX   0x1b0b1

                               MX6UL_PAD_ENET2_RX_DATA1__UART6_DCE_RX   0x1b0b1                            

                        > ;

                } ;

how can we enable the uart7  , anybody help me ?

Original Attachment has been moved to: imx6ul-14x14-evk.dts.zip

[igorpadykov]

Hi wang

one can check if enet2 is enabled in uboot (include/configs/mx6ul_14x14_evk.h)

with CONFIG_FEC_ENET_DEV == 1

and try to disable it too.

Best regards

igor

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[wangjia]

thanks you reply . Unfortunatly i has been disable it already .

because of no use of ENET2 .

#define CONFIG_FEC_ENET_DEV 0

#if (CONFIG_FEC_ENET_DEV == 0)

#define IMX_FEC_BASE                    ENET_BASE_ADDR

#define CONFIG_FEC_MXC_PHYADDR          0x2

#define CONFIG_FEC_XCV_TYPE             RMII

#elif (CONFIG_FEC_ENET_DEV == 1)

#define IMX_FEC_BASE                    ENET2_BASE_ADDR

#define CONFIG_FEC_MXC_PHYADDR          0x1  /* need board rework */

#define CONFIG_FEC_XCV_TYPE             RMII

#endif

[igorpadykov]

Hi wang

one can attach jtag or use memtool to check uart iomux registers,

CCM_CCGR uart clock gate and try manually write to UARTx_UTXD

Best regards

igor