I am using imx6soloX cpu , we need enable cortex-M4 core to run some real-time application and the A9 core run linux.
we use RDC (resource domain controler) to isolate A9 and M4 core. we allocate one ENET ethernet controler dedicated to M4 core. In order minim the M4 core resource, we want to just only use TCM (tightly coupled memory) address space for M4 core. so the TCM address must configured as ENET BD(buffer descriptor) address. But from our test result ,it seems like the TCM address can't filled correctly value when used as BD address which DDR and OCRAM address behave OK.
I look into ARM V7 architecture reference manual , i found this descprition " ARM V7 reserves some CP15 c11 regisger encoding for IMPLEMENTATIONS DEFINED DMA operations to and from TCM". I think this may be related to my issue. But the NXP's imx6soloX manaul don't mention anything about how to enable the TCM DMA operations which belong to CPU vendor implementation define.
so i need help some sugesstion from NXP offical to solve my issue ( use TCM address correctly configed as BD address )
thanks !
i wonder the optional feature CP15 c11 with DMA operations is not implemented or not open to public .
If it not implemented ,the next version NXP Reference Manual version should description this issue.
Hi zhao
m4 configuration is described in sect.13.2.1 Core Module Features
i.MX6SX Reference Manual. Seems optional feature CP15 c11 with DMA
operations is not implemented.
Best regards
igor
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